公开(公告)号：US06229465B1

公开(公告)日：2001-05-08

申请号：US09303288

申请日：1999-04-30

申请人： Raymond J. Bulaga ,  Brooks A. Cummings ,  Douglas R. Firth ,  John L. Harris ,  Christina L. Newman ,  Donald L. Wheater

发明人： Raymond J. Bulaga ,  Brooks A. Cummings ,  Douglas R. Firth ,  John L. Harris ,  Christina L. Newman ,  Donald L. Wheater

IPC分类号： H03M110

CPC分类号： H03M1/108 ,  H03M1/46

摘要： A method and structure for testing an A to D converter containing a plurality of discrete components is provided. The testing methodology includes dividing the circuit into a number of segments of the discrete components (for testing purposes only) with each segment having the same number of discrete components or an unequal but known number of discrete components. The value of the components individually and collectively of each segment is tested and compared with the value of the corresponding components of at least one other segment, and an output signal is generated of the compared value of the segments being tested. Preferably, the components are in a ladder configuration and are either resistors or capacitors. The testing of the components takes place by impressing constant voltage reference signal to at least a portion of one of the segments, sampling and holding this value and then providing a similar reference signal to complementary components of the other of said segments being compared, and comparing the output signal from each of the segments.

摘要翻译： 提供了一种用于测试包含多个分立组件的A到D转换器的方法和结构。 测试方法包括将电路划分成分立组件的多个段（仅用于测试目的），每个段具有相同数目的离散组件或不等的已知数量的分立组件。 对每个段的单独和统一的组件的值进行测试，并将其与至少一个其他段的对应组件的值进行比较，并且生成被测试段的比较值的输出信号。 优选地，组件处于梯形结构中，并且是电阻器或电容器。 组件的测试是通过将恒定的参考信号施加到至少一个段中的一部分，采样并保持该值，然后向被比较的所述段中的另一个的互补分量提供相似的参考信号，并比较 来自每个段的输出信号。

公开(公告)号：US06333706B1

公开(公告)日：2001-12-25

申请号：US09365424

申请日：1999-08-02

申请人： Brooks A. Cummings ,  Douglas R. Firth ,  Donald L. Wheater

发明人： Brooks A. Cummings ,  Douglas R. Firth ,  Donald L. Wheater

IPC分类号： H03M110

CPC分类号： H03M1/108 ,  H03M1/12

摘要： An on-chip analog to digital converter (ADC) test circuit comprises a waveform generator for developing a known arbitrary waveform. A switch selectively connects the waveform generator to the ADC in a test mode or an internal analog input to the ADC in an operate mode. In the test mode the ADC develops a known sequence of digital codes. A signature register is connected to an output of the ADC for receiving and compressing the sequence of digital codes during the test mode. The register develops a single compressed signature representative of the entire ADC digital output sequence. The compression method may be used to test ADC monotonicity, linearity, and that there are no missing codes.

摘要翻译： 片上模数转换器（ADC）测试电路包括用于开发已知任意波形的波形发生器。 在工作模式下，开关选择性地将波形发生器连接到ADC，或者在ADC的内部模拟输入端连接ADC。 在测试模式下，ADC开发了已知的数字代码序列。 签名寄存器连接到ADC的输出端，用于在测试模式期间接收和压缩数字代码序列。 该寄存器开发出整个ADC数字输出序列的单个压缩签名。 压缩方法可用于测试ADC单调性，线性度，并且没有缺少代码。