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公开(公告)号:US12045405B2
公开(公告)日:2024-07-23
申请号:US18255618
申请日:2021-12-14
IPC分类号: G06F3/038 , G06F3/03 , G06F3/0354
CPC分类号: G06F3/038 , G06F3/0304 , G06F3/03543
摘要: An embodiment of the invention relates to a method for sensing a displacement of a pointing device, like a mouse. The pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector and at least one primary photodetector. Each individual value of photodetectors is weighted and compared to sense the displacement of the pointing device by comparing a plurality of storage elements.
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公开(公告)号:US11934598B2
公开(公告)日:2024-03-19
申请号:US18069581
申请日:2022-12-21
发明人: Jérôme Saby , Lorenzo Pierobon
CPC分类号: G06F3/0383 , G06F3/0317 , G06F3/0325 , H04N25/75
摘要: A displacement detection circuit (100) configured to implement a displacement detection method (500) for a pointing device (199) having at least one pixel array (190). The displacement detection circuit (100) includes at least one main calculator (110), at least one auxiliary calculator (111, 112, 113) at least one comparator (130) and at least one motion detector (150). The main calculator (110) is configured to calculate at least one main average (210) corresponding to the average of the at least one pixel array (190), which is compared to at least one auxiliary average (211, 212, 213) of the at least one auxiliary calculator (111, 112, 113). According to the result of the comparison, the at least one motion detector (150) indicates at least one direction (250) of displacement of the pointing device (199).
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公开(公告)号:US20240036655A1
公开(公告)日:2024-02-01
申请号:US18257175
申请日:2021-12-14
IPC分类号: G06F3/03
CPC分类号: G06F3/0304
摘要: In a method for sensing a displacement of a pointing device, like a mouse, said pointing device includes at least one light source configured to illuminate a surface, at least one first secondary photodetector, at least one second secondary photodetector, and at least one primary photodetector. Each individual value of the photodetectors is weighted and compared such as to sense said displacement of the pointing device.
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公开(公告)号:US20240014647A1
公开(公告)日:2024-01-11
申请号:US18302233
申请日:2023-04-18
发明人: Jiri NERAD
IPC分类号: H02H9/04
CPC分类号: H02H9/04
摘要: A voltage limiter for a signal receiver (1), the voltage limiter (20) including: an input (21) connectable to a signal source (10); an output (22) connectable to a detector (70) and connected to the input (21) via a signal conductor (30); a ground conductor (40) connectable to ground (5); a first branch (24) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a first diode element (52); a second branch (25) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a second diode element (53); and a resistor element (36, 54, 55) between the signal conductor (30) and the ground conductor (40).
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公开(公告)号:US20220393583A1
公开(公告)日:2022-12-08
申请号:US17774473
申请日:2020-12-16
发明人: Alessandro VENCA
摘要: A power control unit is provided to control the efficiency of a charge pump converter having a first input terminal and a second input terminal, a primary attenuator and a secondary attenuator between a first input terminal and the second input terminal, a first output terminal, a second output terminal, a secondary attenuator controlling terminal and a primary attenuator controlling terminal to be plugged to the power control unit. The primary attenuator controlling terminal and the secondary attenuator controlling terminal are to attenuate or amplify a signal of the first input terminal and the second input terminal.
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公开(公告)号:US20220393581A1
公开(公告)日:2022-12-08
申请号:US17770094
申请日:2020-11-05
发明人: Alessandro VENCA
摘要: Provided is a gate controller having a primary signal input which is AC coupled to the gate through a capacitor, one or more bias inputs each connected to the gate through a resistor such as to control the DC voltage bias of the gate and therefore the conductivity o the switching element. The bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self-biased, without using bias-reference external to the charge pump. The gate controller is programmable by using potentiometers in place of the bias resistors. The programmable gate controller stages can be connected to form a programmable gate controlled charge pump
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公开(公告)号:US20210342557A1
公开(公告)日:2021-11-04
申请号:US17269552
申请日:2019-08-22
摘要: The present disclosure relates to a NFC communication system, to a method of establishing communication between a wireless communication device and a passive NFC device and to a passive NFC device. The passive NFC device includes an NFC controller, an NFC transceiver coupled with the NFC controller, and at least one persistent flag coupled with the NFC controller, the persistent flag being switchable between an activated state and a deactivated state. The NFC controller is configured to perform a logical operation being divisible into a sequence of at least a first subtask and a second subtask and the NFC controller is configured to ascertain the status of the persistent flag. The NFC controller is further configured to selectively perform at least one of the first subtask and the second subtask on the basis of the status of the persistent flag.
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公开(公告)号:US10910945B2
公开(公告)日:2021-02-02
申请号:US16402905
申请日:2019-05-03
发明人: Mathieu Coustans , Lubomir Plavec , Mario Dellea
IPC分类号: H02M3/07
摘要: The elementary pumping cell comprises an input (E) receiving an input voltage (Vin), a clock terminal (H) receiving a first clock signal (CK1) and an output (S), a first capacitor (C1) having a first terminal connected to the clock terminal and a second terminal, a first transistor (A1) having a first source/drain terminal coupled to the input, a second source/drain terminal and a gate terminal, a second transistor (A2) having a first source/drain terminal, a second source/drain terminal coupled to the input and a gate terminal coupled to the second terminal of the first capacitor, a third transistor (A3) having a first source/drain terminal coupled to the first source/drain terminal of the second transistor, a second source/drain terminal coupled to the gate terminal of the second transistor and a gate terminal coupled to the input, and a fourth transistor (A4) having a first source/drain terminal coupled to the second source/drain terminal of the first transistor, a second source/drain terminal coupled to the first source/drain terminal of the second and third transistors and a gate terminal coupled to the input. The gate terminal of the first transistor is coupled to the gate terminal of the second transistor.
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公开(公告)号:US20200349407A1
公开(公告)日:2020-11-05
申请号:US16834223
申请日:2020-03-30
发明人: Thomas COULOT
摘要: A dual frequency HF-UHF RFID integrated circuit including a power supply. The power supply includes: an HF branch including an HF rectifier and a linear voltage regulator, wherein the HF rectifier is configured to be connected to a resonance circuit formed by a HF antenna-coil and a resonance capacitor and wherein the HF rectifier is connected to the linear voltage regulator; a UHF branch including a UHF rectifier and a shunt voltage regulator, wherein the UHF rectifier has a charge pump and is configured to be connected to a UHF antenna and wherein the UHF rectifier is connected to the shunt voltage regulator; and a supply line, wherein the linear voltage regulator and the shunt voltage regulator are both connected to the supply line of the power supply.
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公开(公告)号:US10725066B2
公开(公告)日:2020-07-28
申请号:US16001107
申请日:2018-06-06
发明人: Yonghong Tao , Sylvain Grosjean , Jean-Michel Daga
IPC分类号: G01P15/125 , G01D5/241 , G01D5/24 , H03F3/00 , H03G3/00
摘要: The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.
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