公开(公告)号：US20150358160A1

公开(公告)日：2015-12-10

申请号：US14759417

申请日：2013-07-10

申请人： Michael KARA-IVANOV ,  Aviad KIPNIS ,  Tzachy REINMAN ,  Efraim MANGELL ,  Erez WAISBARD ,  Yaacov BELENKY ,  Cisco Technology, Inc.

发明人： Michael KARA-IVANOV ,  Aviad KIPNIS ,  Tzachy REINMAN ,  Efraim MANGELL ,  Erez WAISBARD ,  Yaacov BELENKY

IPC分类号： H04L9/08

CPC分类号： H04L9/0861 ,  H04L9/0869

摘要： A method, system and apparatus for deriving a secondary secret from a root secret are described, the method, system and apparatus including reserving a memory buffer included in an integrated circuit, the memory buffer being large enough to contain all of the bits which will include the secondary secret, receiving a plurality of bits from a root secret, the root secret being stored in a secure memory of the integrated circuit, inputting the plurality of bits from the root secret and at least one control bit into a permutation network, and thereby producing a multiplicity of output bits, the at least one control bit including one of one bit of a value g, and one bit an output of a function which receives g as an input, receiving the multiplicity of output bits from the permutation network, inputting the multiplicity of output bits from the permutation network into a plurality of logic gates, thereby combining the multiplicity of output bits, wherein a fixed number of bits is output from the logic gates, inputting the fixed number of bits output by the logic gates into an error correcting code module, the fixed number of bits output by the logic gates including a first group of intermediate output bits and a second group of intermediate output bits and receiving output bits from the error correcting code module, the output bits of the error correcting code module including the first group of intermediate output bits as changed by the error correcting code module, where the change depends on the second group of intermediate output bits, filling non-filled registers in the reserved memory buffer with the first group of intermediate output bits as changed by the error correcting code module, and repeating the steps of “receiving a plurality of bits from a root secret” through “filling non-filled registers in the reserved memory buffer” until the entire secondary secret is derived, wherein the steps of “receiving a plurality of bits from a root secret” through “filling non-filled registers in the reserved memory buffer” are performed in a single clock cycle of the integrated circuit. Related apparatus, methods and systems are also described.

公开(公告)号：US07316934B2

公开(公告)日：2008-01-08

申请号：US10181518

申请日：2000-12-18

申请人： Efraim Mangell

发明人： Efraim Mangell

IPC分类号： H01L21/00

CPC分类号： G03F1/14 ,  G03F1/00 ,  G03F7/2022 ,  H01L23/544 ,  H01L27/02 ,  H01L27/115 ,  H01L27/11517 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2924/0002 ,  H01L2924/00

摘要： A system for personalizing one or more electrical circuits having plurality of layers with electrical characteristics. The layers being produced by an electrical characteristic determination process (ECDP). The system for personalizing includes a wafer stage for receiving a wafer in order to produce a plurality of electrical circuits. The system is configured to apply a personalization process during production of the layers. The personalization process includes using a first ECDP in the layer to produce identical electrical characteristics on the wafer in each of the plurality of electrical circuits, and using a second ECDP in the layer to modify one or more electrical characteristics in selected electrical circuits so as to incorporate in the selected circuits an individualized digital number, giving rise to the desired personalizing of one or more of the specified electrical circuits. Related apparatus and methods are also provided.

摘要翻译： 一种用于个性化具有多个具有电特性的层的一个或多个电路的系统。 这些层由电特性确定过程（ECDP）产生。 用于个性化的系统包括用于接收晶片以便产生多个电路的晶片台。 该系统被配置为在层的生产期间应用个性化过程。 个性化处理包括在层中使用第一ECDP以在多个电路中的每一个中在晶片上产生相同的电特性，并且使用该层中的第二ECDP来修改所选择的电路中的一个或多个电特性，以便 在所选择的电路中并入一个个性化的数字数字，产生一个或多个指定电路的期望的个性化。 还提供了相关的装置和方法。

公开(公告)号：US20080119956A1

公开(公告)日：2008-05-22

申请号：US11979400

申请日：2007-11-02

申请人： Efraim Mangell

发明人： Efraim Mangell

IPC分类号： G06F19/00

CPC分类号： G03F1/14 ,  G03F1/00 ,  G03F7/2022 ,  H01L23/544 ,  H01L27/02 ,  H01L27/115 ,  H01L27/11517 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2924/0002 ,  H01L2924/00

摘要： A system for personalizing one or more electrical circuits having plurality of layers with electrical characteristics. The layers being produced by an electrical characteristic determination process (ECDP). The system for personalizing includes a wafer stage for receiving a wafer in order to produce a plurality of electrical circuits. The system is configured to apply a personalization process during production of the layers. The personalization process includes using a first ECDP in the layer to product identical electrical characteristics on the wafer in each of the plurality of electrical circuits, and using a second ECDP in the layer to modify one or more electrical characteristics in selected electrical circuits so as to incorporate in the selected circuits an individualized digital number, giving rise to the desired personalizing of one or more of the specified electrical circuits. Related apparatus and methods are also provided.

摘要翻译： 一种用于个性化具有多个具有电特性的层的一个或多个电路的系统。 这些层由电特性确定过程（ECDP）产生。 用于个性化的系统包括用于接收晶片以便产生多个电路的晶片台。 该系统被配置为在层的生产期间应用个性化过程。 个性化过程包括在层中使用第一ECDP以在多个电路中的每一个中在晶片上产生相同的电特性，并且使用层中的第二ECDP来修改所选择的电路中的一个或多个电特性，以便 在所选择的电路中并入一个个性化的数字数字，产生一个或多个指定电路的期望的个性化。 还提供了相关的装置和方法。