公开(公告)号：US11854635B2

公开(公告)日：2023-12-26

申请号：US16653994

申请日：2019-10-15

申请人： Micron Technology, Inc.

发明人： Yueping Li

IPC分类号： G11C29/04 ,  G11C29/44 ,  G11C5/04 ,  H01L23/544 ,  H01L25/065 ,  H01L21/66 ,  H01L23/525 ,  H01L23/00

CPC分类号： G11C29/04 ,  G11C5/04 ,  G11C29/44 ,  H01L22/22 ,  H01L23/5256 ,  H01L23/544 ,  H01L25/0657 ,  G11C2029/0401 ,  G11C2029/4402 ,  H01L22/14 ,  H01L22/20 ,  H01L24/98 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2224/16225 ,  H01L2924/19107

摘要： Several embodiments of reclaimable semiconductor device packages and assemblies are disclosed herein. A semiconductor device assembly (100) includes a package (101) having a housing (102) and a package contact (104) arranged to receive a signal indicative of a reclamation state. A plurality of modules of semiconductor dies (106) are located within the housing and electrically coupled to the package contact (104). The dies (106) of the first and second modules dies are configured to store a module configuration state. The first and second modules (107a, 107b) are enabled for operation based, at least in part, on the reclamation state and the module configuration state.

公开(公告)号：US11688694B2

公开(公告)日：2023-06-27

申请号：US16927805

申请日：2020-07-13

申请人： ASML Netherlands B.V.

发明人： Johannes Cornelis Jacobus De Langen ,  Marcel Nicolaas Jacobus van Kervinck ,  Vincent Sylvester Kuiper

IPC分类号： H01L23/00 ,  H01L23/544 ,  G06K19/06 ,  G06F21/44 ,  G09C5/00 ,  G06F21/73 ,  H04L9/40 ,  G06K7/14 ,  H01L25/065 ,  H04L9/14 ,  H04L9/32

CPC分类号： H01L23/544 ,  G06F21/44 ,  G06F21/73 ,  G06K7/1417 ,  G06K19/06037 ,  G06K19/06178 ,  G09C5/00 ,  H01L25/0652 ,  H04L9/14 ,  H04L9/3271 ,  H04L63/08 ,  G06F2221/2103 ,  H01L2223/5444 ,  H01L2223/54413 ,  H01L2223/54433

摘要： An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.

公开(公告)号：US20180151509A1

公开(公告)日：2018-05-31

申请号：US15877895

申请日：2018-01-23

申请人： SK hynix Inc.

发明人： Sang Jin BYEON

IPC分类号： H01L23/544 ,  H01L25/065 ,  G11C8/12 ,  G11C29/44

CPC分类号： H01L23/544 ,  G11C8/12 ,  G11C2029/4402 ,  H01L25/0657 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor apparatus includes a chip ID generation unit, a chip ID transmission unit and a chip stack information generation unit. The chip ID generation unit is configured to generate a chip ID signal. The chip ID transmission unit is configured to output the chip ID signal to a common line on the basis of whether another chip is electrically coupled therewith. The chip stack information generation unit is configured to be electrically coupled with the common line in response to the chip ID signal and generate a stack information signal.

公开(公告)号：US20180090223A1

公开(公告)日：2018-03-29

申请号：US15815521

申请日：2017-11-16

申请人： Micron Technology, Inc.

发明人： Yueping Li

IPC分类号： G11C29/04 ,  H01L23/525 ,  G11C29/44 ,  H01L21/66 ,  G11C5/04 ,  H01L23/544 ,  H01L25/065 ,  H01L23/00

CPC分类号： G11C29/04 ,  G11C5/04 ,  G11C29/44 ,  G11C2029/0401 ,  G11C2029/4402 ,  H01L22/14 ,  H01L22/20 ,  H01L22/22 ,  H01L23/5256 ,  H01L23/544 ,  H01L24/98 ,  H01L25/0657 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2224/16225 ,  H01L2924/19107

摘要： Several embodiments of reclaimable semiconductor device packages and assemblies are disclosed herein. A semiconductor device assembly (100) includes a package (101) having a housing (102) and a package contact (104) arranged to receive a signal indicative of a reclamation state. A plurality of modules of semiconductor dies (106) are located within the housing and electrically coupled to the package contact (104). The dies (106) of the first and second modules dies are configured to store a module configuration state. The first and second modules (107a, 107b) are enabled for operation based, at least in part, on the reclamation state and the module configuration state.

公开(公告)号：US09875808B2

公开(公告)日：2018-01-23

申请号：US14760615

申请日：2013-01-15

申请人： Yueping Li

发明人： Yueping Li

IPC分类号： G11C5/02 ,  G11C29/04 ,  H01L23/544 ,  G11C29/44 ,  H01L25/065 ,  G11C5/04 ,  H01L23/525 ,  H01L23/00 ,  H01L21/66

CPC分类号： G11C29/04 ,  G11C5/04 ,  G11C29/44 ,  G11C2029/0401 ,  G11C2029/4402 ,  H01L22/14 ,  H01L22/20 ,  H01L22/22 ,  H01L23/5256 ,  H01L23/544 ,  H01L24/98 ,  H01L25/0657 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2224/16225 ,  H01L2924/19107

摘要： Several embodiments of reclaimable semiconductor device packages and assemblies are disclosed herein. A semiconductor device assembly (100) includes a package (101) having a housing (102) and a package contact (104) arranged to receive a signal indicative of a reclamation state. A plurality of modules of semiconductor dies (106) are located within the housing and electrically coupled to the package contact (104). The dies (106) of the first and second modules dies are configured to store a module configuration state. The first and second modules (107a, 107b) are enabled for operation based, at least in part, on the reclamation state and the module configuration state.

公开(公告)号：US20170263575A1

公开(公告)日：2017-09-14

申请号：US15063644

申请日：2016-03-08

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Qing Cao ,  Kangguo Cheng ,  Zhengwen Li ,  Fei Liu

IPC分类号： H01L23/00 ,  H01L29/78 ,  H01L21/768 ,  H01L27/02 ,  H01L21/84 ,  G06F21/44 ,  H01L27/12

CPC分类号： H01L21/76877 ,  G06F21/44 ,  G06F21/73 ,  G09C1/00 ,  H01L21/76816 ,  H01L21/84 ,  H01L23/544 ,  H01L23/57 ,  H01L27/11233 ,  H01L27/1203 ,  H01L29/7838 ,  H01L2223/5444 ,  H04L9/3278

摘要： An integrated circuit includes an array of devices including a physically unclonable function (PUF) for chip authentication. A logic pattern is stored in the devices. The logic pattern is determined in accordance with processing variations during manufacture of the array. The logic pattern is represented with a first state for one or more devices with contact shorts and a second state with one or more devices without contact shorts.

公开(公告)号：US09640243B2

公开(公告)日：2017-05-02

申请号：US14727108

申请日：2015-06-01

申请人： PS4 Luxco S.a.r.l.

发明人： Kayoko Shibata ,  Hiroaki Ikeda

IPC分类号： G11C11/407 ,  H01L23/544 ,  H01L23/535 ,  H01L23/522 ,  H01L25/065

CPC分类号： G11C11/407 ,  H01L23/5226 ,  H01L23/535 ,  H01L23/544 ,  H01L25/0657 ,  H01L2223/5444 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2224/05599

摘要： A method is disclosed for selecting a semiconductor chip in a stack of semiconductor chips interconnected by through-lines by receiving selection signals at the first terminals located on a first surface of the semiconductor chip, connecting each first terminal to a selected second terminal located on a second surface of the semiconductor chip where each selected second terminal is not aligned with the first terminal to which it is connected, and generating an internal signal based on a selected one of the received selection signals.

公开(公告)号：US09628086B2

公开(公告)日：2017-04-18

申请号：US14542343

申请日：2014-11-14

申请人： Case Western Reserve University

发明人： Ting He ,  Fengchao Zhang ,  Swarup Bhunia ,  Philip X. -L. Feng

IPC分类号： H01L23/525 ,  H03K19/177 ,  G11C17/16 ,  G01R27/02 ,  H01L23/544 ,  G11C17/18 ,  H01L23/538 ,  H01L23/00 ,  H01L23/62

CPC分类号： H03K19/17768 ,  G01R27/025 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5252 ,  H01L23/5382 ,  H01L23/544 ,  H01L23/573 ,  H01L23/576 ,  H01L23/62 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/5444 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H03K19/17704 ,  H03K19/17724 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/29099

摘要： An antifuse apparatus can include a cantilever extending from a first electrode portion to terminate in a distal end. A second electrode portion can be spaced apart from the cantilever by an air gap. In response to a program voltage across the first and second electrode portions, the cantilever can be adapted to move from an unprogrammed condition, corresponding to an open circuit condition where the cantilever is spaced apart from the second electrode portion, to at least one permanent programmed condition, corresponding to a short circuit condition between the first and second electrode portions where the cantilever engages the second electrode portion.

公开(公告)号：US09589902B2

公开(公告)日：2017-03-07

申请号：US14672811

申请日：2015-03-30

申请人： SEIKO INSTRUMENTS INC.

发明人： Yasunobu Matsumoto ,  Masaki Suzuki ,  Makoto Asou ,  Hiroshi Morita

IPC分类号： H01L23/544 ,  H01L25/18

CPC分类号： H01L23/544 ,  H01L25/18 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2223/54466 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor wafer has formed thereon various types of semiconductor chips and enables different types of semiconductor chips having the same chip size to be easily distinguished. An excluded region is formed on an outer periphery of the semiconductor wafer, and a region inside the excluded region is divided into different types of regions by boundaries. Mark chips are respectively arranged in the vicinity of both ends of the boundaries.

摘要翻译： 半导体晶片在其上形成有各种类型的半导体芯片，并且能够容易地区分具有相同芯片尺寸的不同类型的半导体芯片。 在半导体晶片的外周形成排除区域，排除区域内的区域由边界划分为不同种类的区域。 标记芯片分别布置在边界两端附近。

公开(公告)号：US20160099234A1

公开(公告)日：2016-04-07

申请号：US14886190

申请日：2015-10-19

申请人： Conversant Intellectual Property Management Inc.

发明人： Peter B. GILLINGHAM

IPC分类号： H01L25/065

CPC分类号： H01L25/0657 ,  G11C5/02 ,  G11C5/06 ,  H01L21/02697 ,  H01L21/82 ,  H01L23/481 ,  H01L23/5286 ,  H01L23/544 ,  H01L24/03 ,  H01L24/16 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/14 ,  H03K17/00 ,  H01L2924/00

摘要： In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to be implemented using TSVs, without requiring angular rotation of alternate ICs of the stack.