Methods to control film removal rates for improved polishing in metal CMP
    2.
    发明授权
    Methods to control film removal rates for improved polishing in metal CMP 失效
    控制膜去除速率以改善金属CMP抛光的方法

    公开(公告)号:US06693035B1

    公开(公告)日:2004-02-17

    申请号:US09420682

    申请日:1999-10-19

    IPC分类号: H01L21302

    摘要: A method for chemical mechanical planarization of a semiconductor structure comprised of a conductive metal interconnect layer, a barrier or liner film, and an underlying dielectric layer using a two-step polishing process is provided. In the first step, the conducting metal overburden is substantially removed with little removal of the barrier or liner layer or the underlying dielectric structure. In the second step, the barrier layer is removed with little removal of the underlying dielectric layer. Five different methods and associated slurry compositions are described for the second polishing step, each adjusted to the state of the wafer following the first step of polishing. By using the appropriate method, the integrity of the remaining semiconductor structure can be substantially retained.

    摘要翻译: 提供了使用两步抛光工艺的由导电金属互连层,阻挡层或衬里膜以及下层介电层构成的半导体结构的化学机械平面化方法。 在第一步骤中,导电金属覆盖层基本上被除去,几乎没有去除阻挡层或衬里层或下面的介电结构。 在第二步骤中,去除阻挡层,几乎不去除下面的介电层。 对于第二抛光步骤描述了五种不同的方法和相关的浆料组合物,每种调整至第一抛光步骤后的晶片状态。 通过使用适当的方法,可以基本上保持剩余半导体结构的完整性。