Bus protocol violation monitor systems and methods
    2.
    发明授权
    Bus protocol violation monitor systems and methods 失效
    总线协议违规监控系统和方法

    公开(公告)号:US5951661A

    公开(公告)日:1999-09-14

    申请号:US911248

    申请日:1997-08-15

    摘要: A computer system employing a bus protocol violation monitor system and method. The monitor system includes a bus wait timer logic circuit which comprises a state machine that receives a portion of the bus interface control signals, a programmable timer module and a plurality of data selectors that are actuatable responsive to a control input. In addition to storing the violation information in a register, the system provides for interrupts with graded levels of priorities.

    摘要翻译: 一种采用总线协议违规监控系统和方法的计算机系统。 监视器系统包括总线等待定时器逻辑电路,其包括接收总线接口控制信号的一部分的状态机,可编程定时器模块和响应于控制输入可启动的多个数据选择器。 除了将违规信息存储在寄存器中,系统还提供了具有分级优先级的中断。