公开(公告)号：US06300800B1

公开(公告)日：2001-10-09

申请号：US09448307

申请日：1999-11-24

申请人： Jonathan A. Schmitt ,  Eric W. Eklund

发明人： Jonathan A. Schmitt ,  Eric W. Eklund

IPC分类号： H03K19094

CPC分类号： H03K19/018521 ,  H03K19/09429

摘要： An integrated circuit output buffer includes a core terminal, a pad terminal, a pad pull-up transistor, a pad pull-down transistor, a pull-up voltage protection transistor, and a selectively conductive pad voltage feedback path. The pad pull-up transistor and the pad pull-down transistor are coupled to the pad terminal and are biased to respectively charge and discharge the pad terminal in response to a data signal received on the core terminal. The pull-up voltage protection transistor is coupled in series between the pad pull-up transistor and the pad terminal and has a control terminal and a well terminal. The selectively conductive pad voltage feedback path is coupled between the pad terminal and the well terminal of the pull-up voltage protection transistor.

摘要翻译： 集成电路输出缓冲器包括芯端子，焊盘端子，焊盘上拉晶体管，焊盘下拉晶体管，上拉电压保护晶体管和选择性导电焊盘电压反馈路径。 焊盘上拉晶体管和焊盘下拉晶体管耦合到焊盘端子，并且被偏置以分别响应于在核心端子上接收的数据信号对焊盘端子进行充电和放电。 上拉电压保护晶体管串联耦合在焊盘上拉晶体管和焊盘端子之间，并具有控制端子和阱端子。 选择性导电焊盘电压反馈路径耦合在焊盘端子和上拉电压保护晶体管的阱端子之间。