摘要:
A timing controller adapted to a flat display includes a voltage detecting circuit, a clock generator, a first multiplexer and a second multiplexer. The voltage detecting circuit detects a variation of an operating voltage and thus outputs a reset signal. The clock generator outputs a start signal and a first clock signal. The first multiplexer is controlled by the reset signal and coupled to the start signal and a constant voltage. The second multiplexer is controlled by the reset signal and coupled to the first clock signal and a second clock signal. A frequency of the second clock signal is obviously higher than a frequency of the first clock signal.
摘要:
A timing controller adapted to a flat display includes a voltage detecting circuit, a clock generator, a first multiplexer and a second multiplexer. The voltage detecting circuit detects a variation of an operating voltage and thus outputs a reset signal. The clock generator outputs a start signal and a first clock signal. The first multiplexer is controlled by the reset signal and coupled to the start signal and a constant voltage. The second multiplexer is controlled by the reset signal and coupled to the first clock signal and a second clock signal. A frequency of the second clock signal is obviously higher than a frequency of the first clock signal.
摘要:
A gate driver for driving a display device is disclosed. The gate driver, which includes: a first input buffer configured to for receiving a reference voltage and outputting a first buffered voltage, a control circuit configured to for outputting a plurality of scan starting signals and compensating starting signals, a plurality of compensating output buffers, and a plurality of scan output buffers. Each of the plurality of compensating output buffers is configured to respectively receive one of the compensating starting signals and respectively output a compensating signal, wherein, each compensating output buffer receives the first buffered voltage as power. Each of the plurality of scanning output buffers is configured to respectively receive one of the scan starting signals and output a scan signal.
摘要:
A gate driver for driving a display device is disclosed. The gate driver, which includes: a first input buffer configured to for receiving a reference voltage and outputting a first buffered voltage, a control circuit configured to for outputting a plurality of scan starting signals and compensating starting signals, a plurality of compensating output buffers, and a plurality of scan output buffers. Each of the plurality of compensating output buffers is configured to respectively receive one of the compensating starting signals and respectively output a compensating signal, wherein, each compensating output buffer receives the first buffered voltage as power. Each of the plurality of scanning output buffers is configured to respectively receive one of the scan starting signals and output a scan signal.