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    Graphic Processor Based Accelerator System and Method
    1.
    发明申请
    Graphic Processor Based Accelerator System and Method 有权
    基于图形处理器的加速器系统和方法

    公开(公告)号：US20080117220A1

    公开(公告)日：2008-05-22

    申请号：US11860254

    申请日：2007-09-24

    申请人： Anatoli Gorchetchnikov ,  Heather Marie Ames ,  Massimiliano Versace ,  Fabrizio Santini

    发明人： Anatoli Gorchetchnikov ,  Heather Marie Ames ,  Massimiliano Versace ,  Fabrizio Santini

    IPC分类号： G06T1/20 ,  G06F15/76

    CPC分类号： G06T1/60 ,  G06F9/5027 ,  G06F2209/509 ,  G06N3/063 ,  G06N99/005 ,  G06T1/20

    摘要： An accelerator system is implemented on an expansion card comprising a printed circuit board having (a) one or more graphics processing units (GPU), (b) two or more associated memory banks (logically or physically partitioned), (c) a specialized controller, and (d) a local bus providing signal coupling compatible with the PCI industry standards (this includes but is not limited to PCI-Express, PCI-X, USB 2.0, or functionally similar technologies). The controller handles most of the primitive operations needed to set up and control GPU computation. As a result, the computer's central processing unit (CPU) is freed from this function and is dedicated to other tasks. In this case a few controls (simulation start and stop signals from the CPU and the simulation completion signal back to CPU), GPU programs and input/output data are the information exchanged between CPU and the expansion card. Moreover, since on every time step of the simulation the results from the previous time step are used but not changed, the results are preferably transferred back to CPU in parallel with the computation.

    摘要翻译： 在包括具有（a）一个或多个图形处理单元（GPU），（b）两个或更多个相关联的存储体（逻辑或物理分割）的印刷电路板的扩展卡上实现加速器系统，（c）专用控制器 ，以及（d）提供与PCI行业标准兼容的信号耦合的本地总线（这包括但不限于PCI-Express，PCI-X，USB 2.0或功能类似的技术）。 控制器处理设置和控制GPU计算所需的大部分原始操作。 因此，计算机的中央处理单元（CPU）不受此功能的影响，致力于其他任务。 在这种情况下，几个控制（来自CPU的模拟启动和停止信号，仿真完成信号返回到CPU），GPU程序和输入/输出数据是CPU和扩展卡之间交换的信息。 此外，由于在模拟的每个时间步长上使用来自前一时间步长的结果，而是不改变结果，所以结果优选地与计算并行地传送回CPU。

    Graphic processor based accelerator system and method
    2.
    发明授权
    Graphic processor based accelerator system and method 有权
    基于图形处理器的加速器系统和方法

    公开(公告)号：US08648867B2

    公开(公告)日：2014-02-11

    申请号：US11860254

    申请日：2007-09-24

    申请人： Anatoli Gorchetchnikov ,  Heather Marie Ames ,  Massimiliano Versace ,  Fabrizio Santini

    发明人： Anatoli Gorchetchnikov ,  Heather Marie Ames ,  Massimiliano Versace ,  Fabrizio Santini

    IPC分类号： G06F15/00

    CPC分类号： G06T1/60 ,  G06F9/5027 ,  G06F2209/509 ,  G06N3/063 ,  G06N99/005 ,  G06T1/20

    摘要： An accelerator system is implemented on an expansion card comprising a printed circuit board having (a) one or more graphics processing units (GPU), (b) two or more associated memory banks (logically or physically partitioned), (c) a specialized controller, and (d) a local bus providing signal coupling compatible with the PCI industry standards (this includes but is not limited to PCI-Express, PCI-X, USB 2.0, or functionally similar technologies). The controller handles most of the primitive operations needed to set up and control GPU computation. As a result, the computer's central processing unit (CPU) is freed from this function and is dedicated to other tasks. In this case a few controls (simulation start and stop signals from the CPU and the simulation completion signal back to CPU), GPU programs and input/output data are the information exchanged between CPU and the expansion card. Moreover, since on every time step of the simulation the results from the previous time step are used but not changed, the results are preferably transferred back to CPU in parallel with the computation.

    摘要翻译： 在包括具有（a）一个或多个图形处理单元（GPU），（b）两个或更多个相关联的存储体（逻辑或物理分割）的印刷电路板的扩展卡上实现加速器系统，（c）专用控制器 ，以及（d）提供与PCI行业标准兼容的信号耦合的本地总线（这包括但不限于PCI-Express，PCI-X，USB 2.0或功能类似的技术）。 控制器处理设置和控制GPU计算所需的大部分原始操作。 因此，计算机的中央处理单元（CPU）不受此功能的影响，致力于其他任务。 在这种情况下，几个控制（来自CPU的模拟启动和停止信号，仿真完成信号返回到CPU），GPU程序和输入/输出数据是CPU和扩展卡之间交换的信息。 此外，由于在模拟的每个时间步长上使用来自前一时间步长的结果，而是不改变结果，所以结果优选地与计算并行地传送回CPU。