公开(公告)号：US08580674B2

公开(公告)日：2013-11-12

申请号：US12866324

申请日：2008-12-09

申请人： Michelle Yvonne Simmons ,  Andreas Fuhrer ,  Martin Fuechsle ,  Bent Weber ,  Thilo Curd Gerhard Reusch ,  Wilson Pok ,  Frank Ruess

发明人： Michelle Yvonne Simmons ,  Andreas Fuhrer ,  Martin Fuechsle ,  Bent Weber ,  Thilo Curd Gerhard Reusch ,  Wilson Pok ,  Frank Ruess

IPC分类号： H01L21/4763

CPC分类号： H01L23/544 ,  B82B3/0019 ,  B82Y10/00 ,  H01L29/66439 ,  H01L2924/0002 ,  H01L2924/00

摘要： This invention concerns the fabrication of nano to atomic scale devices, that is electronic devices fabricated down to atomic accuracy. The fabrication process uses either an SEM or a STM tip to pattern regions on a semiconductor substrate. Then, forming electrically active parts of the device at those regions. Encapsulating the formed device. Using a SEM or optical microscope to align locations for electrically conducting elements on the surface of the encapsulating semiconductor with respective active parts of the device encapsulated below the surface. Forming electrically conducting elements on the surface at the aligned locations. And, electrically connecting electrically conducting elements on the surface with aligned parts of the device encapsulated below the surface to allow electrical connectivity and tunability of the device. In further aspects the invention concerns the devices themselves.

摘要翻译： 本发明涉及纳米到原子尺度装置的制造，即以原子精度制造的电子装置。 制造工艺使用SEM或STM尖端来对半导体衬底上的区域进行图案化。 然后，在那些区域形成器件的电活性部分。 封装形成的装置。 使用SEM或光学显微镜将包封半导体表面上的导电元件的位置与封装在表面下方的器件的相应有效部分对准。 在对准位置的表面上形成导电元件。 并且，将表面上的导电元件电连接到封装在表面下方的器件的对准部分，以允许器件的电连接和可调谐性。 在另外的方面，本发明涉及装置本身。

公开(公告)号：US20110121446A1

公开(公告)日：2011-05-26

申请号：US12866324

申请日：2008-12-08

申请人： Michelle Yvonne Simmons ,  Andreas Fuhrer ,  Martin Fuechsle ,  Bent Weber ,  Thilo Curd Gerhard Reusch ,  Wilson Pok ,  Frank Ruess

发明人： Michelle Yvonne Simmons ,  Andreas Fuhrer ,  Martin Fuechsle ,  Bent Weber ,  Thilo Curd Gerhard Reusch ,  Wilson Pok ,  Frank Ruess

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L21/66

CPC分类号： H01L23/544 ,  B82B3/0019 ,  B82Y10/00 ,  H01L29/66439 ,  H01L2924/0002 ,  H01L2924/00

摘要： This invention concerns the fabrication of nano to atomic scale devices, that is electronic devices fabricated down to atomic accuracy. The fabrication process uses either an SEM or a STM tip to pattern regions on a semiconductor substrate. Then, forming electrically active parts of the device at those regions. Encapsulating the formed device. Using a SEM or optical microscope to align locations for electrically conducting elements on the surface of the encapsulating semiconductor with respective active parts of the device encapsulated below the surface. Forming electrically conducting elements on the surface at the aligned locations. And, electrically connecting electrically conducting elements on the surface with aligned parts of the device encapsulated below the surface to allow electrical connectivity and tunability of the device. In further aspects the invention concerns the devices themselves.

摘要翻译： 本发明涉及纳米到原子尺度装置的制造，即以原子精度制造的电子装置。 制造工艺使用SEM或STM尖端来对半导体衬底上的区域进行图案化。 然后，在那些区域形成器件的电活性部分。 封装形成的装置。 使用SEM或光学显微镜将包封半导体表面上的导电元件的位置与封装在表面下方的器件的相应有效部分对准。 在对准位置的表面上形成导电元件。 并且，将表面上的导电元件电连接到封装在表面下方的器件的对准部分，以允许器件的电连接和可调谐性。 在另外的方面，本发明涉及装置本身。

公开(公告)号：US20060275958A1

公开(公告)日：2006-12-07

申请号：US10568559

申请日：2004-08-20

申请人： Frank Ruess ,  Lars Oberbeck ,  Michelle Simmons ,  K.E. Goh ,  Alexander Hamilton ,  Mladen Mitic ,  Rolf Brenner ,  Neil Curson ,  Toby Hallam

发明人： Frank Ruess ,  Lars Oberbeck ,  Michelle Simmons ,  K.E. Goh ,  Alexander Hamilton ,  Mladen Mitic ,  Rolf Brenner ,  Neil Curson ,  Toby Hallam

IPC分类号： H01L21/84 ,  H01L21/00

CPC分类号： H01L23/544 ,  B82Y10/00 ,  B82Y30/00 ,  G01Q80/00 ,  H01L29/66439 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

摘要： This invention concerns the fabrication of nanoscale and atomic scale devices. The method involves creating one or more registration markers. Using a SEM or optical microscope to form an image of the registration markers and the tip of a scanning tunnelling microscope (STM). Using the image to position and reposition the STM tip to pattern the device structure. Forming the active region of the device and then encapsulating it such that one or more of the registration markers are still visible to allow correct positioning of surface electrodes. The method can be used to form any number of device structures including quantum wires, single electron transistors, arrays or gate regions. The method can also be used to produce 3D devices by patterning subsequent layers with the STM and encapsulating in between.