公开(公告)号：US20070178696A1

公开(公告)日：2007-08-02

申请号：US11343648

申请日：2006-01-30

Applicant: Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Wang ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Shau-Lin Shue

Inventor： Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Wang ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Shau-Lin Shue

IPC: H01L21/44

CPC classification number: H01L21/28518

Abstract: A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.

Abstract translation: 一种形成硅化镍的方法包括对包含硅表面的半导体衬底脱气。 在脱气操作之后，在金属沉积工艺，金属沉积工艺期间或两者之间冷却基板。 冷却将基板的温度抑制到低于形成硅化镍所需的温度的温度。 在沉积过程中镍的扩散最小化。 沉积后，使用退火工艺来促使形成均匀的硅化物膜。 在各种实施例中，金属膜可以包括含有镍和另一元素的二元相合金。

公开(公告)号：US20060113673A1

公开(公告)日：2006-06-01

申请号：US11002331

申请日：2004-12-01

Applicant: Gin Wang ,  Chao-Hsien Peng ,  Chii-Ming Wu ,  Chih-Wei Chang ,  Shau-Lin Shue

Inventor： Gin Wang ,  Chao-Hsien Peng ,  Chii-Ming Wu ,  Chih-Wei Chang ,  Shau-Lin Shue

IPC: H01L23/48

CPC classification number: H01L21/76843 ,  H01L21/02129 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/28562 ,  H01L21/31625 ,  H01L23/482 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.

Abstract translation: 半导体器件及其制造。 在第一电介质层中形成开口，暴露晶体管的有源区，并且在开口中以厚度小于等于一致地形成原子层沉积（ALD）TaN势垒。 在原子层沉积（ALD）TaN势垒上形成铜层以填充开口。

公开(公告)号：US20070221993A1

公开(公告)日：2007-09-27

申请号：US11389309

申请日：2006-03-27

Applicant: Shau-Lin Shue ,  Chen-Hua Yu ,  Cheng-Tung Lin ,  Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Wang ,  Cp Lo ,  Chih-W Chang

Inventor： Shau-Lin Shue ,  Chen-Hua Yu ,  Cheng-Tung Lin ,  Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Wang ,  Cp Lo ,  Chih-W Chang

IPC: H01L27/12 ,  H01L27/01 ,  H01L31/0392

CPC classification number: H01L29/665 ,  H01L21/76243 ,  H01L29/785

Abstract: A semiconductor device and method of manufacturing are provided that include forming an alloy layer having the formula MbX over a silicon-containing substrate, where Mb is a metal and X is an alloying additive, the alloy layer being annealed to form a metal alloy silicide layer on the gate region and in active regions of the semiconductor device.

Abstract translation: 提供一种半导体器件和制造方法，包括在含硅衬底上形成具有式MbX的合金层，其中Mb是金属，X是合金添加剂，合金层被退火以形成金属合金硅化物层 在栅极区域和半导体器件的有源区中。