公开(公告)号：US20130146741A1

公开(公告)日：2013-06-13

申请号：US13715933

申请日：2012-12-14

申请人： David Shih-Wei Chou

发明人： David Shih-Wei Chou

IPC分类号： F16M13/02

CPC分类号： F16M13/022 ,  C12M21/02 ,  C12M29/06 ,  C12M31/00

摘要： A device and system for growing a photosynthetic culture is provided which employs one or a plurality of vertically disposed photopanels having interior cavities configured for holding liquid and the photosynthetic culture such as algae. The inner chamber of the photopanels may have a shape that is structurally supported by bridging elements. The bridging elements may be formed as stepped cones that may function as light guides to the interior chamber.

摘要翻译： 提供一种用于生长光合培养物的装置和系统，其采用一个或多个垂直布置的光面板，其具有被配置用于保持液体和诸如藻类的光合培养物的内部空腔。 照片面板的内腔可以具有结构上由桥接元件支撑的形状。 桥接元件可以形成为可用作到内部室的光导的阶梯锥体。

公开(公告)号：US20100230816A1

公开(公告)日：2010-09-16

申请号：US12787559

申请日：2010-05-26

申请人： Hung-Wen Su ,  Shih-Wei Chou ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Shih-Wei Chou ,  Ming-Hsing Tsai

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L23/528 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76888 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor devices and methods for forming the same in which damages to a low-k dielectric layer therein can be reduced or even prevented are provided. A semiconductor device is provided, comprising a substrate. A dielectric layer with at least one conductive feature therein overlies the substrate. An insulating cap layer overlies the top surface of the low-k dielectric layer adjacent to the conductive feature, wherein the insulating cap layer comprises metal ions.

摘要翻译： 提供了可以减少或甚至防止对其中低k电介质层的损坏的用于形成其的半导体器件及其制造方法。 提供了一种半导体器件，包括衬底。 其中具有至少一个导电特征的电介质层覆盖在衬底上。 绝缘覆盖层覆盖邻近导电特征的低k电介质层的顶表面，其中绝缘帽层包括金属离子。

公开(公告)号：US20060246720A1

公开(公告)日：2006-11-02

申请号：US11117152

申请日：2005-04-28

申请人： Chii-Ming Wu ,  Shih-Wei Chou ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Shau-Lin Shue

发明人： Chii-Ming Wu ,  Shih-Wei Chou ,  Cheng-Tung Lin ,  Chih-Wei Chang ,  Shau-Lin Shue

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/28518

摘要： A semiconductor method of manufacture involving suicides is provided. Embodiments comprise forming a stacked arrangement of layers, the stacked arrangement of layers comprising an additive layer on a substrate, and a metal layer on the additive layer, annealing the stacked arrangement of layers to form a metal silicide layer on the substrate, wherein the metal silicide layer includes an additive from the additive layer. Alternative embodiments include etching the stacked arrangement of layers to remove an unreacted material layer. In an alternative embodiment, the stacked arrangement of layer comprises a metal layer on a substrate, an additive layer on the metal layer, and an optional oxygen barrier layer on the additive layer. An annealing process forms a metal silicide containing an additive. Metal silicides formed according to embodiments are particularly resistant to agglomeration during high temperature processing.

摘要翻译： 提供涉及自杀的半导体制造方法。 实施例包括形成层的堆叠布置，在衬底上包括添加层的层的堆叠排列以及添加层上的金属层，退火层的层叠布置以在衬底上形成金属硅化物层，其中金属 硅化物层包括来自添加剂层的添加剂。 替代实施例包括蚀刻层的堆叠布置以去除未反应的材料层。 在替代实施例中，层的堆叠布置包括在基底上的金属层，金属层上的添加层和在添加剂层上的任选的氧阻隔层。 退火工艺形成含有添加剂的金属硅化物。 根据实施例形成的金属硅化物特别耐高温处理期间的附聚。

公开(公告)号：US06995089B2

公开(公告)日：2006-02-07

申请号：US10434741

申请日：2003-05-08

申请人： Shih-Wei Chou ,  Minghsing Tsai ,  Winston Shue

发明人： Shih-Wei Chou ,  Minghsing Tsai ,  Winston Shue

IPC分类号： H01L21/302

CPC分类号： H01L21/32115 ,  B23H5/08 ,  C23F1/18 ,  C25F3/02 ,  H01L21/32134 ,  H01L21/7684 ,  H05K3/06 ,  H05K3/07 ,  H05K3/107 ,  H05K2203/0353 ,  H05K2203/1476

摘要： A new method is provided that allows for the application of electropolish for removal of copper and that is independent of pattern density of the removed copper. Electropolish of the copper is first accomplished by reversing current in the H2SO4 or H3PO4 solution. After identifying the endpoint of the electropolish, chemical etching of the copper in a H2SO4 or H3PO4 solution is continued, in this manner avoiding effects of high current density introduced by pattern density.

摘要翻译： 提供了一种新的方法，其允许使用电解抛光以除去铜，并且不依赖于去除的铜的图案密度。 铜的电解抛光首先通过在H 2 SO 3 / SO 3 H 4 SO 3 / SO 3 H 4 O 3 / 。 在鉴定了电解抛光物质的终点之后，在H 2 SO 3或4 H 3 PO 4中的铜的化学蚀刻， 继续以这种方式避免由图案密度引入的高电流密度的影响。

公开(公告)号：US06652726B1

公开(公告)日：2003-11-25

申请号：US10147759

申请日：2002-05-16

申请人： Shih-Wei Chou

发明人： Shih-Wei Chou

IPC分类号： C25D500

CPC分类号： C25D7/12 ,  H01L21/2885

摘要： A method for reducing or avoiding semiconductor wafer peripheral defects and contamination during and following electrodeposition including providing a wafer chuck assembly sealably attached to a back side of a semiconductor wafer leaving an exposed peripheral portion of the back side of the semiconductor wafer the backside parallel to a front side of the semiconductor wafer comprising a process surface; contacting at least the semiconductor process surface with a process solution; and, simultaneously directing a pressurized flow of gas onto the exposed peripheral portion such that the pressurized flow of gas covers the exposed peripheral portion including being radially directed outward toward the periphery of the semiconductor wafer.

摘要翻译： 一种用于减少或避免电沉积期间和之后的半导体晶片周边缺陷和污染的方法，包括提供密封地附接到半导体晶片的背面的晶片卡盘组件，留下半导体晶片背面的暴露外围部分，其背面平行于 所述半导体晶片的前侧包括工艺表面; 使至少半导体工艺表面与工艺溶液接触; 并且同时将加压的气流引导到暴露的周边部分上，使得加压气体流覆盖暴露的周边部分，包括朝向半导体晶片的周边径向指向外部。

公开(公告)号：US20120115217A1

公开(公告)日：2012-05-10

申请号：US13327686

申请日：2011-12-15

申请人： David Shih-Wei Chou

发明人： David Shih-Wei Chou

IPC分类号： C12M1/42

CPC分类号： C12M21/02 ,  C12M23/04 ,  C12M39/00 ,  C12M41/08 ,  C12N1/12 ,  C12R1/89

摘要： A device and system for growing a photosynthetic culture is provided which employs one or a plurality of vertically disposed photopanels having interior cavities configured for holding liquid and the photosynthetic culture such as algae. The inner chamber of the photopanels may have a shape that is structurally supported by bridging elements. The bridging elements may be formed as stepped cones that may function as light guides to the interior chamber.

摘要翻译： 提供一种用于生长光合培养物的装置和系统，其采用一个或多个垂直布置的光面板，其具有被配置用于保持液体和诸如藻类的光合培养物的内部空腔。 照片面板的内腔可以具有结构上由桥接元件支撑的形状。 桥接元件可以形成为可用作到内部室的光导的阶梯锥体。

公开(公告)号：US07749896B2

公开(公告)日：2010-07-06

申请号：US11210226

申请日：2005-08-23

申请人： Hung-Wen Su ,  Shih-Wei Chou ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Shih-Wei Chou ,  Ming-Hsing Tsai

IPC分类号： H01L21/00

CPC分类号： H01L23/528 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76888 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor devices and methods for forming the same in which damages to a low-k dielectric layer therein can be reduced or even prevented are provided. A semiconductor device is provided, comprising a substrate. A dielectric layer with at least one conductive feature therein overlies the substrate. An insulating cap layer overlies the top surface of the low-k dielectric layer adjacent to the conductive feature, wherein the insulating cap layer comprises metal ions.

摘要翻译： 提供了可以减少或甚至防止对其中低k电介质层的损坏的用于形成其的半导体器件及其制造方法。 提供了一种半导体器件，包括衬底。 其中具有至少一个导电特征的电介质层覆盖在衬底上。 绝缘覆盖层覆盖邻近导电特征的低k电介质层的顶表面，其中绝缘帽层包括金属离子。

公开(公告)号：US20100151639A1

公开(公告)日：2010-06-17

申请号：US12712518

申请日：2010-02-25

申请人： Shau-Lin Shue ,  Chen-Hua Yu ,  Cheng-Tung Lin ,  Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Jei Wang ,  CP Lo ,  Chih-Wei Chang

发明人： Shau-Lin Shue ,  Chen-Hua Yu ,  Cheng-Tung Lin ,  Chii-Ming Wu ,  Shih-Wei Chou ,  Gin Jei Wang ,  CP Lo ,  Chih-Wei Chang

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L29/665 ,  H01L21/76243 ,  H01L29/785

摘要： Provided is a method of fabrication a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, the gate structure including a gate dielectric and a gate electrode disposed over the gate dielectric, forming source/drain regions in the semiconductor substrate at either side of the gate structure, forming a metal layer over the semiconductor substrate and the gate structure, the metal layer including a refractory metal layer or a refractory metal compound layer; forming an alloy layer over the metal layer; and performing an annealing thereby forming metal alloy silicides over the gate structure and the source/drain regions, respectively.

摘要翻译： 提供一种制造半导体器件的方法，其包括提供半导体衬底，在衬底上形成栅极结构，栅极结构包括栅极电介质和设置在栅极电介质上的栅电极，在半导体衬底中形成源极/漏极区域 在栅极结构的任一侧，在半导体衬底和栅极结构之上形成金属层，金属层包括难熔金属层或难熔金属化合物层; 在所述金属层上形成合金层; 并进行退火，从而分别在栅极结构和源极/漏极区域上形成金属合金硅化物。

公开(公告)号：US06803309B2

公开(公告)日：2004-10-12

申请号：US10190140

申请日：2002-07-03

申请人： Shih-Wei Chou ,  Chii-Ming Wu

发明人： Shih-Wei Chou ,  Chii-Ming Wu

IPC分类号： H01L2144

CPC分类号： H01L21/76843 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76814

摘要： A method for forming an adhesion/barrier liner with reduced fluorine contamination to improve adhesion and a specific contact resistance of metal interconnects including providing a semiconductor wafer having a process surface including an etched opening extending through a dielectric insulating layer thickness and in closed communication with a conductive underlayer surface; pre-heating the semiconductor wafer in a plasma reactor to a pre-heating temperature of at least about 400° C.; cleaning the etched opening according to a plasma assisted reactive pre-cleaning process (RPC) comprising nitrogen trifluoride (NF3); and, blanket depositing at least a first adhesion/barrier layer over the etched opening substantially free of fluorine containing residue.

摘要翻译： 一种用于形成具有降低的氟污染物的粘合/阻挡衬里以提高金属互连的粘合性和特定接触电阻的方法，包括提供具有包括延伸​​穿过介电绝缘层厚度的蚀刻开口并与导电性密封连通的工艺表面的半导体晶片 底层表面 将等离子体反应器中的半导体晶片预热至至少约400℃的预热温度; 根据包括三氟化氮（NF 3）的等离子体辅助反应性预清洗工艺（RPC）清洁蚀刻开口; 并且在基本上不含氟残留物的蚀刻开口上至少铺设第一粘附/阻挡层。

公开(公告)号：US06649513B1

公开(公告)日：2003-11-18

申请号：US10146286

申请日：2002-05-15

申请人： Ming-Hsing Tsai ,  Shih-Wei Chou ,  Winston Shue ,  Mong-Song Liang

发明人： Ming-Hsing Tsai ,  Shih-Wei Chou ,  Winston Shue ,  Mong-Song Liang

IPC分类号： H01L214763

CPC分类号： H01L21/76831 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76877

摘要： A method of fabricating a planarized metal structure comprising the following steps. A structure is provided. A patterned dielectric layer is formed over the structure. The patterned dielectric layer having an opening formed therein and exposing at least a portion of the structure. A first-metal layer is formed over the patterned dielectric layer filling the opening. The first-metal layer including at least a doped metal portion adjacent the patterned dielectric layer. The doped metal portion being doped with a second-metal. The structure is annealed to form a second-metal oxide layer adjacent the patterned dielectric layer. The first-metal layer and the second-metal oxide layer are planarized using only a electropolishing process to remove the excess of the first-metal layer and the second-metal oxide layer from over the patterned dielectric layer and leaving a planarized metal structure within the opening.

摘要翻译： 一种制造平面化金属结构的方法，包括以下步骤。 提供了一种结构。 在该结构上形成图案化的介电层。 所述图案化介电层具有形成在其中的开口并暴露所述结构的至少一部分。 在填充开口的图案化电介质层上形成第一金属层。 第一金属层至少包括邻近图案化介电层的掺杂金属部分。 掺杂金属部分掺杂有第二金属。 将该结构退火以形成邻近图案化介电层的第二金属氧化物层。 第一金属层和第二金属氧化物层仅使用电解抛光工艺进行平面化，以从图案化的介电层上除去过量的第一金属层和第二金属氧化物层，并在其内部留下平坦化的金属结构 开放