公开(公告)号：US4945258A

公开(公告)日：1990-07-31

申请号：US281394

申请日：1988-12-08

申请人： Gary A. Picard ,  Hayagriva V. Rao

发明人： Gary A. Picard ,  Hayagriva V. Rao

IPC分类号： H03K19/0185 ,  H03K19/094

CPC分类号： H03K19/018542 ,  H03K19/09436

摘要： A high-speed swtich driver provides a precise output voltage swing for microwave switches. A first embodiment is for use with TTL circuits, and includes alternating high-gain voltage level shift and differential amplifier stages. A second embodiment also includes alternating voltage level shift and differential amplifier stages, but further has the flexibility to be used with a variety of logic circuits, including TTL, ECL, differential ECL, CMOS any circuit requiring user-defined input levels. Both embodiments provide complementary outputs at voltage levels that may be set by the user.

摘要翻译： 高速swtich驱动器为微波开关提供精确的输出电压摆幅。 第一实施例用于TTL电路，并且包括交替的高增益电压电平移位和差分放大器级。 第二实施例还包括交流电压电平移位和差分放大器级，但是还具有与各种逻辑电路（包括TTL，ECL，差分ECL，CMOS）一起使用的灵活性，任何需要用户定义输入电平的电路。 两个实施例提供可由用户设置的电压电平的互补输出。

公开(公告)号：US4897613A

公开(公告)日：1990-01-30

申请号：US263270

申请日：1988-10-27

申请人： Hayagriva V. Rao ,  Gary A. Picard

发明人： Hayagriva V. Rao ,  Gary A. Picard

IPC分类号： H03F1/30 ,  H03K19/003 ,  H03K19/0185

CPC分类号： H03F1/306 ,  H03K19/00384 ,  H03K19/018542

摘要： A temperature-compensated output buffer is disclosed that incorporates a temperature-compensating network into a GaAs output buffer that has been interfaced to Silicon-based circuitry to regulate the output voltage of the buffer under changing temperature conditions. The temperature-compensating network includes a differential amplifier whose output varies with temperature due to a network of series-connected Schottky diodes. The output of the differential amplifier controls a bleeder MESFET that controls the output voltage of the buffer so that temperature variations do not adversely affect the buffer output.

摘要翻译： 公开了一种温度补偿输出缓冲器，其将温度补偿网络结合到GaAs输出缓冲器中，GaAs输出缓冲器已经连接到基于硅的电路，以在变化的温度条件下调节缓冲器的输出电压。 温度补偿网络包括一个差分放大器，由于串联肖特基二极管网络，输出随温度变化。 差分放大器的输出控制一个泄放MESFET控制缓冲器的输出电压，使温度变化不会对缓冲器输出产生不利影响。

公开(公告)号：US4481430A

公开(公告)日：1984-11-06

申请号：US404318

申请日：1982-08-02

申请人： William R. Houk ,  Hayagriva V. Rao

发明人： William R. Houk ,  Hayagriva V. Rao

IPC分类号： G06F1/28 ,  G06F1/26 ,  H03K17/22 ,  H03K19/082 ,  H03K17/30 ,  H03K17/62 ,  H03K19/007

CPC分类号： H03K19/0826 ,  H03K17/22 ,  H03K2017/226

摘要： An improved tristate enable circuit is described for activating a tristate enable gate to maintain the high impedance third state of a common bus tristate output device during "power down" and "power up" transitions of the common power supply V.sub.cc. The enable gate circuit element tends to turn off at a voltage level V.sub.cc2 generally greater than the voltage level V.sub.cc3 at which the tristate output device circuit elements turn off. As a result the high impedance state may be lost during "power down". A threshold activation circuit is coupled to the enable gate for activating the enable gate when the threshold activation circuit senses a higher common power supply voltage level V.sub.cc1. The threshold activation circuit operatively activates the enable gate over a voltage range from V.sub.cc1 to a lesser common power supply voltage level V.sub.cc4. Component values are selected for relating the voltage levels so that V.sub.cc1 >V.sub.cc2 and V.sub.cc3 >V.sub.cc4. As a result the turn off of circuit elements is sequenced by the threshold activation circuit.

摘要翻译： 描述了一种改进的三态使能电路，用于在公共电源Vcc的“断电”和“上电”转换期间激活三态使能门以保持公共总线三态输出设备的高阻抗第三状态。 使能栅极电路元件趋向于在三态输出器件电路元件关断的电压电平Vcc3的电压电平Vcc2处一般大于电压电平Vcc3。 因此，在“断电”期间，高阻抗状态可能会丢失。 当阈值激活电路感测到更高的公共电源电压电平Vcc1时，门限激活电路耦合到使能门，用于激活使能栅极。 门限激活电路在Vcc1到较小的公共电源电压电平Vcc4的电压范围内可操作地激活使能栅极。 选择元件值以使电压电平相关，使Vcc1> Vcc2和Vcc3> Vcc4。 结果，门限激活电路对电路元件的关断进行排序。