Synchronous driver circuit and integrated circuit for use therein
    1.
    发明申请
    Synchronous driver circuit and integrated circuit for use therein 有权
    同步驱动电路及集成电路

    公开(公告)号:US20110012570A1

    公开(公告)日:2011-01-20

    申请号:US12658560

    申请日:2010-02-05

    IPC分类号: G05F1/613

    CPC分类号: H05B33/0818 H02M3/1582

    摘要: The present invention discloses a synchronous driver circuit, comprising: an inductor having one end coupled to an input voltage; a first power transistor having one end coupled to the other end of the inductor and another end supplying an output voltage; a second power transistor having one end coupled to the other end of the inductor and another end coupled to ground; a control circuit for controlling the operation of the first and second power transistors; a gate driver coupled to the control circuit and having an output controlling the gate of the first power transistor; and a bootstrap capacitor having one end coupled to a voltage node and the other end coupled to the other end of the inductor, the voltage across the bootstrap capacitor being provided as the operational voltage of the gate driver.

    摘要翻译: 本发明公开了一种同步驱动器电路,包括:电感器,其一端耦合到输入电压; 第一功率晶体管,其一端耦合到电感器的另一端,另一端提供输出电压; 第二功率晶体管,其一端耦合到电感器的另一端,另一端耦合到地; 用于控制第一和第二功率晶体管的操作的控制电路; 耦合到控制电路并具有控制第一功率晶体管的栅极的输出的栅极驱动器; 以及自耦电容器,其一端耦合到电压节点,另一端耦合到电感器的另一端,所述自举电容器两端的电压被提供为栅极驱动器的工作电压。

    Preparation of ultrathin magnetic layer on semiconductors
    2.
    发明授权
    Preparation of ultrathin magnetic layer on semiconductors 失效
    半导体上制备超薄磁性层

    公开(公告)号:US06753192B1

    公开(公告)日:2004-06-22

    申请号:US10368565

    申请日:2003-02-20

    IPC分类号: H01L2100

    摘要: According to the method for preparation of ultrathin magnetic layer on semiconductor of this invention, a non-ferromagnetic metal buffer layer thinner than 40 ML is formed on the semiconductor substrate on which the magnetic layer is to be prepared. The thickness of the non-ferromagnetic metal buffer layer may be 0.5-9 ML, preferably 1-8 ML, most preferably 1.5-6 ML. Thereafter, the magnetic layer is formed on said non-ferromagnetic metal buffer layer. The thickness of the magnetic layer so prepared may be less than 40 ML, close to the limitation of ultrathin. Material for the non-ferromagnetic metal buffer layer is preferably a metal or metal alloy that is immiscible with the magnetic layer when the magnetic layer is formed on the buffer layer. In the embodiments of the present invention, the non-ferromagnetic metal is silver, while material of the magnetic layer is cobalt. This invention also discloses the magnetic structure so prepared.

    摘要翻译: 根据本发明的半导体上制备超薄磁性层的方法,在要制备磁性层的半导体衬底上形成比40ML薄的非铁磁金属缓冲层。 非铁磁金属缓冲层的厚度可以是0.5-9ML,优选1-8ML,最优选1.5-6ML。 此后,磁性层形成在所述非铁磁性金属缓冲层上。 如此制备的磁性层的厚度可以小于40ML,接近超薄的限制。 非磁性金属缓冲层的材料优选是当磁性层形成在缓冲层上时与磁性层不混溶的金属或金属合金。 在本发明的实施例中,非铁磁金属是银,而磁性层的材料是钴。 本发明还公开了如此制备的磁结构。

    Synchronous driver circuit and integrated circuit for use therein
    3.
    发明授权
    Synchronous driver circuit and integrated circuit for use therein 有权
    同步驱动电路及集成电路

    公开(公告)号:US08217632B2

    公开(公告)日:2012-07-10

    申请号:US12658560

    申请日:2010-02-05

    IPC分类号: G05F1/613 G05F1/44

    CPC分类号: H05B33/0818 H02M3/1582

    摘要: The present invention discloses a synchronous driver circuit, comprising: an inductor having one end coupled to an input voltage; a first power transistor having one end coupled to the other end of the inductor and another end supplying an output voltage; a second power transistor having one end coupled to the other end of the inductor and another end coupled to ground; a control circuit for controlling the operation of the first and second power transistors; a gate driver coupled to the control circuit and having an output controlling the gate of the first power transistor; and a bootstrap capacitor having one end coupled to a voltage node and the other end coupled to the other end of the inductor, the voltage across the bootstrap capacitor being provided as the operational voltage of the gate driver.

    摘要翻译: 本发明公开了一种同步驱动器电路,包括:电感器,其一端耦合到输入电压; 第一功率晶体管,其一端耦合到电感器的另一端,另一端提供输出电压; 第二功率晶体管,其一端耦合到电感器的另一端,另一端耦合到地; 用于控制第一和第二功率晶体管的操作的控制电路; 耦合到控制电路并具有控制第一功率晶体管的栅极的输出的栅极驱动器; 以及自耦电容器,其一端耦合到电压节点,另一端耦合到电感器的另一端,所述自举电容器两端的电压被提供为栅极驱动器的工作电压。

    Heat transfer apparatus
    4.
    发明授权
    Heat transfer apparatus 失效
    传热装置

    公开(公告)号:US06873527B2

    公开(公告)日:2005-03-29

    申请号:US10446135

    申请日:2003-05-28

    摘要: The invention relates to heat transfer apparatus for cooling electronic components. There is a continuously increasing demand for compact electronic systems such as portable laptop computers and thirst for high processing power, leading to high heat generated by components residing within these systems. These electronic systems have to be cooled due to their fixed operating temperature ranges. Operating an electronic component beyond its rated operating temperature range will damage electronic components. Instead of conventionally utilising a bigger fan, a smaller sized solution is required for cooling an electronic component contained in a compact electronic system, for example a notebook computer. A heat transfer apparatus includes a heat carrier for conveying heat away from the electronic system into a radiator for dissipation. The radiator is placed into a cooler for directing air through the radiator and expelling heated air, cooling the radiator in the process.

    摘要翻译: 本发明涉及用于冷却电子部件的传热装置。 紧凑型电子系统(如便携式笔记本电脑)的需求不断增长,渴望获得高处理能力,从而导致驻留在这些系统内的组件产生的高热量。 这些电子系统由于其固定的工作温度范围而必须冷却。 操作电子元件超出额定工作温度范围会损坏电子元件。 代替常规地使用较大的风扇,需要较小尺寸的解决方案来冷却包含在紧凑型电子系统(例如笔记本电脑)中的电子部件。 传热装置包括用于将热量从电子系统传送到散热器以用于散热的热载体。 将散热器放置在冷却器中,以引导空气通过散热器并排出加热的空气,在此过程中冷却散热器。

    Selectable multi-protocol cable termination
    5.
    发明授权
    Selectable multi-protocol cable termination 失效
    可选择多协议电缆终端

    公开(公告)号:US06018549A

    公开(公告)日:2000-01-25

    申请号:US873545

    申请日:1997-06-12

    IPC分类号: H04B3/00

    CPC分类号: H04B3/50

    摘要: An integrated cable-termination circuit is presented that can be selectably automatically configured to terminate a signal cable in conformance with one of a plurality of electrical interface standards, including, for example, CCITT/EIA standards V.11/RS-422 and V.35. Selected termination configurations are maintained when input voltages exceed power supply voltages or when power to the circuit is removed. A plurality of cable-termination circuits are provided to form an integrated selectable cable terminator for selectably terminating multiple cables, each in conformance with one of a plurality of electrical interface standards.

    摘要翻译: 提出了一种集成的电缆终端电路,其可选地自动配置为根据多个电接口标准中的一个,包括例如CCITT / EIA标准V.11 / RS-422和V终止信号电缆。 35。 当输入电压超过电源电压或者当电路的电源被去除时,选择的端接配置将被保持。 提供多个电缆终端电路以形成用于可选择地终止多个电缆的集成可选择的电缆终端器,每个电缆符合多个电接口标准中的一个。