公开(公告)号：US08546216B2

公开(公告)日：2013-10-01

申请号：US13218538

申请日：2011-08-26

申请人： Hirofumi Iikawa ,  Masayuki Tanaka

发明人： Hirofumi Iikawa ,  Masayuki Tanaka

IPC分类号： H01L21/336

CPC分类号： H01L29/42336 ,  H01L21/76224 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a first insulating layer, charge storage layers, element isolation insulating films, and a second insulating layer formed on the charge storage layers and the element isolation insulating films and including a stacked structure of a first silicon nitride film, first silicon oxide film, intermediate insulating film and second silicon oxide film. The first silicon nitride film has a nitrogen concentration of not less than 21×1015 atoms/cm2. Each element isolation insulating film includes a high-temperature oxide film formed along lower side surfaces of the charge storage layers between the charge storage layers and a coating type insulating film. The first silicon nitride film is formed on an upper surface of the high-temperature oxide film in upper surfaces of the element isolation insulating films and not on the upper surface of the coating type insulating film.

摘要翻译： 非易失性半导体存储器件包括第一绝缘层，电荷存储层，元件隔离绝缘膜和形成在电荷存储层和元件隔离绝缘膜上的第二绝缘层，并且包括第一氮化硅膜的堆叠结构，第一 氧化硅膜，中间绝缘膜和第二氧化硅膜。 第一氮化硅膜的氮浓度不小于21×10 15原子/ cm 2。 每个元件隔离绝缘膜包括沿电荷存储层和涂层型绝缘膜之间的电荷存储层的下侧表面形成的高温氧化膜。 第一氮化硅膜形成在元件隔离绝缘膜的上表面的高温氧化膜的上表面上，而不是在涂层型绝缘膜的上表面上。

公开(公告)号：US20110312155A1

公开(公告)日：2011-12-22

申请号：US13218538

申请日：2011-08-26

申请人： Hirofumi IIKAWA ,  Masayuki Tanaka

发明人： Hirofumi IIKAWA ,  Masayuki Tanaka

IPC分类号： H01L21/762 ,  H01L21/28

CPC分类号： H01L29/42336 ,  H01L21/76224 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a first insulating layer, charge storage layers, element isolation insulating films, and a second insulating layer formed on the charge storage layers and the element isolation insulating films and including a stacked structure of a first silicon nitride film, first silicon oxide film, intermediate insulating film and second silicon oxide film. The first silicon nitride film has a nitrogen concentration of not less than 21×1015 atoms/cm2. Each element isolation insulating film includes a high-temperature oxide film formed along lower side surfaces of the charge storage layers between the charge storage layers and a coating type insulating film. The first silicon nitride film is formed on an upper surface of the high-temperature oxide film in upper surfaces of the element isolation insulating films and not on the upper surface of the coating type insulating film.

摘要翻译： 非易失性半导体存储器件包括第一绝缘层，电荷存储层，元件隔离绝缘膜和形成在电荷存储层和元件隔离绝缘膜上的第二绝缘层，并且包括第一氮化硅膜的堆叠结构，第一 氧化硅膜，中间绝缘膜和第二氧化硅膜。 第一氮化硅膜的氮浓度不小于21×10 15原子/ cm 2。 每个元件隔离绝缘膜包括沿电荷存储层和涂层型绝缘膜之间的电荷存储层的下侧表面形成的高温氧化膜。 第一氮化硅膜形成在元件隔离绝缘膜的上表面的高温氧化膜的上表面上，而不是在涂层型绝缘膜的上表面上。

公开(公告)号：US08471319B2

公开(公告)日：2013-06-25

申请号：US13237486

申请日：2011-09-20

申请人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7883

摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate; a gate insulating film formed above the semiconductor substrate; a charge storage layer formed above the gate insulating film; a multilayered interelectrode insulating film formed in a first region above an upper surface portion of the element isolation insulating film, a second region above a sidewall portion of the charge storage layer and a third region above an upper surface portion of the charge storage layer, the interelectrode insulating film including a stack of an upper silicon oxide film, a middle silicon nitride film, and a lower silicon oxide film; a control gate electrode formed above the interelectrode insulating film; wherein the middle silicon nitride film is thinner in the third region than in the second region and the upper silicon oxide film is thicker in the third region than in the second region.

摘要翻译： 公开了一种半导体器件。 半导体器件包括半导体衬底; 形成在所述半导体衬底上的栅极绝缘膜; 形成在栅极绝缘膜上方的电荷存储层; 形成在元件隔离绝缘膜的上表面部分上方的第一区域中的多层电极间绝缘膜，电荷存储层的侧壁部分上方的第二区域和电荷存储层的上表面部分上方的第三区域， 电极间绝缘膜，其包括上氧化硅膜，中间氮化硅膜和下氧化硅膜的堆叠; 形成在电极间绝缘膜之上的控制栅电极; 其中中间氮化硅膜在第三区域比第二区域薄，上部氧化硅膜在第三区域比第二区域厚。

公开(公告)号：US08941168B2

公开(公告)日：2015-01-27

申请号：US13423633

申请日：2012-03-19

申请人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L29/788 ,  H01L29/423 ,  H01L21/28 ,  H01L27/115 ,  H01L29/66 ,  H01L21/762

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/76232 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes an element isolation region having an element isolation insulating film therein; an active region delineated by the element isolation region; agate insulating film formed in the active region; a charge storage layer above the gate insulating film; and an interelectrode insulating film. The interelectrode insulating film is formed in a first region above an upper surface of the element isolation insulating film, a second region along a sidewall of the charge storage layer, and a third region above an upper surface of the charge storage layer. The interelectrode insulating film includes a stack of a first silicon oxide film, a first silicon nitride film, a second silicon oxide film, and a second silicon nitride film. A control electrode layer is formed above the interelectrode insulating film. The second silicon oxide film is thinner in the first region than in the third region.

摘要翻译： 半导体器件包括其中具有元件隔离绝缘膜的元件隔离区域; 由元件隔离区域划定的活动区域; 形成在活性区域中的玛瑙绝缘膜; 栅极绝缘膜上方的电荷存储层; 和电极间绝缘膜。 电极间绝缘膜形成在元件隔离绝缘膜的上表面上方的第一区域，沿着电荷存储层的侧壁的第二区域和电荷存储层的上表面上方的第三区域。 电极间绝缘膜包括第一氧化硅膜，第一氮化硅膜，第二氧化硅膜和第二氮化硅膜的堆叠。 在电极间绝缘膜的上方形成控制电极层。 第二氧化硅膜在第一区域比在第三区域薄。

公开(公告)号：US08791521B2

公开(公告)日：2014-07-29

申请号：US13423664

申请日：2012-03-19

申请人： Koji Nakahara ,  Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Koji Nakahara ,  Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  H01L29/42324 ,  H01L29/7881

摘要： A semiconductor device includes an interelectrode insulating film formed between a charge storage layer and a control electrode layer. The interelectrode insulating film is formed in a first region above an upper surface of an element isolation insulating film, a second region along a sidewall of the charge storage layer, and a third region above an upper surface of the charge storage layer. The interelectrode insulating film includes a first stack including a first silicon nitride film or a high dielectric constant film interposed between a first and a second silicon oxide film or a second stack including a second high dielectric constant film and a third silicon oxide film, and a second silicon nitride film formed between the control electrode layer and the first or the second stack. The second silicon nitride film is relatively thinner in the third region than in the first region.

摘要翻译： 半导体器件包括在电荷存储层和控制电极层之间形成的电极间绝缘膜。 电极间绝缘膜形成在元件隔离绝缘膜的上表面上方的第一区域，沿着电荷存储层的侧壁的第二区域和电荷存储层的上表面上方的第三区域。 电极间绝缘膜包括：第一堆叠，其包括介于第一和第二氧化硅膜之间的第一氮化硅膜或高介电常数膜，或包括第二高介电常数膜和第三氧化硅膜的第二堆叠， 形成在控制电极层和第一或第二堆叠之间的第二氮化硅膜。 在第三区域中，第二氮化硅膜比第一区域相对薄。

公开(公告)号：US08022467B2

公开(公告)日：2011-09-20

申请号：US12467424

申请日：2009-05-18

申请人： Hirofumi Iikawa ,  Masayuki Tanaka

发明人： Hirofumi Iikawa ,  Masayuki Tanaka

IPC分类号： H01L29/792

CPC分类号： H01L29/42336 ,  H01L21/76224 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a first insulating layer, charge storage layers, element isolation insulating films, and a second insulating layer formed on the charge storage layers and the element isolation insulating films and including a stacked structure of a first silicon nitride film, first silicon oxide film, intermediate insulating film and second silicon oxide film. The first silicon nitride film has a nitrogen concentration of not less than 21×1015 atoms/cm2. Each element isolation insulating film includes a high-temperature oxide film formed along lower side surfaces of the charge storage layers between the charge storage layers and a coating type insulating film. The first silicon nitride film is formed on an upper surface of the high-temperature oxide film in upper surfaces of the element isolation insulating films and not on the upper surface of the coating type insulating film.

摘要翻译： 非易失性半导体存储器件包括第一绝缘层，电荷存储层，元件隔离绝缘膜和形成在电荷存储层和元件隔离绝缘膜上的第二绝缘层，并且包括第一氮化硅膜的堆叠结构，第一 氧化硅膜，中间绝缘膜和第二氧化硅膜。 第一氮化硅膜的氮浓度不小于21×10 15原子/ cm 2。 每个元件隔离绝缘膜包括沿电荷存储层和涂层型绝缘膜之间的电荷存储层的下侧表面形成的高温氧化膜。 第一氮化硅膜形成在元件隔离绝缘膜的上表面的高温氧化膜的上表面上，而不是在涂层型绝缘膜的上表面上。

公开(公告)号：US20100102377A1

公开(公告)日：2010-04-29

申请号：US12467424

申请日：2009-05-18

申请人： Hirofumi IIKAWA ,  Masayuki Tanaka

发明人： Hirofumi IIKAWA ,  Masayuki Tanaka

IPC分类号： H01L29/792 ,  H01L21/762 ,  H01L21/336

CPC分类号： H01L29/42336 ,  H01L21/76224 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulating layer formed on the semiconductor substrate, a plurality of charge storage layers formed on the first insulating layer, a plurality of element isolation insulating films formed between the charge storage layers respectively, a second insulating layer formed on the charge storage layers and the element isolation insulating films, the second insulating layer including a stacked structure of a first silicon nitride film, a first silicon oxide film, an intermediate insulating film having a relative dielectric constant of not less than 7 and a second silicon oxide film, and a control electrode formed on the second insulating layer. The first silicon nitride film has a nitrogen concentration of not less than 21×1015 atoms/cm2.

摘要翻译： 非易失性半导体存储器件包括半导体衬底，形成在半导体衬底上的第一绝缘层，形成在第一绝缘层上的多个电荷存储层，分别形成在电荷存储层之间的多个元件隔离绝缘膜，第二绝缘层 绝缘层，形成在电荷存储层和元件隔离绝缘膜上，第二绝缘层包括第一氮化硅膜，第一氧化硅膜，相对介电常数不小于7的中间绝缘膜的堆叠结构 和第二氧化硅膜，以及形成在第二绝缘层上的控制电极。 第一氮化硅膜的氮浓度不小于21×10 15原子/ cm 2。

公开(公告)号：US20130069142A1

公开(公告)日：2013-03-21

申请号：US13423633

申请日：2012-03-19

申请人： Kazuhiro MATSUO ,  Masayuki TANAKA ,  Hirofumi IIKAWA

发明人： Kazuhiro MATSUO ,  Masayuki TANAKA ,  Hirofumi IIKAWA

IPC分类号： H01L29/792 ,  H01L21/762

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/76232 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes an element isolation region having an element isolation insulating film therein; an active region delineated by the element isolation region; agate insulating film formed in the active region; a charge storage layer above the gate insulating film; and an interelectrode insulating film. The interelectrode insulating film is formed in a first region above an upper surface of the element isolation insulating film, a second region along a sidewall of the charge storage layer, and a third region above an upper surface of the charge storage layer. The interelectrode insulating film includes a stack of a first silicon oxide film, a first silicon nitride film, a second silicon oxide film, and a second silicon nitride film. A control electrode layer is formed above the interelectrode insulating film. The second silicon oxide film is thinner in the first region than in the third region.

摘要翻译： 半导体器件包括其中具有元件隔离绝缘膜的元件隔离区域; 由元件隔离区域划定的活动区域; 形成在活性区域中的玛瑙绝缘膜; 栅极绝缘膜上方的电荷存储层; 和电极间绝缘膜。 电极间绝缘膜形成在元件隔离绝缘膜的上表面上方的第一区域，沿着电荷存储层的侧壁的第二区域和电荷存储层的上表面上方的第三区域。 电极间绝缘膜包括第一氧化硅膜，第一氮化硅膜，第二氧化硅膜和第二氮化硅膜的堆叠。 在电极间绝缘膜的上方形成控制电极层。 第二氧化硅膜在第一区域比在第三区域薄。

公开(公告)号：US20130069135A1

公开(公告)日：2013-03-21

申请号：US13423664

申请日：2012-03-19

申请人： Koji Nakahara ,  Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Koji Nakahara ,  Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11521 ,  H01L29/42324 ,  H01L29/7881

摘要： A semiconductor device includes an interelectrode insulating film formed between a charge storage layer and a control electrode layer. The interelectrode insulating film is formed in a first region above an upper surface of an element isolation insulating film, a second region along a sidewall of the charge storage layer, and a third region above an upper surface of the charge storage layer. The interelectrode insulating film includes a first stack including a first silicon nitride film or a high dielectric constant film interposed between a first and a second silicon oxide film or a second stack including a second high dielectric constant film and a third silicon oxide film, and a second silicon nitride film formed between the control electrode layer and the first or the second stack. The second silicon nitride film is relatively thinner in the third region than in the first region.

摘要翻译： 半导体器件包括在电荷存储层和控制电极层之间形成的电极间绝缘膜。 电极间绝缘膜形成在元件隔离绝缘膜的上表面上方的第一区域，沿着电荷存储层的侧壁的第二区域和电荷存储层的上表面上方的第三区域。 电极间绝缘膜包括：第一堆叠，其包括介于第一和第二氧化硅膜之间的第一氮化硅膜或高介电常数膜，或包括第二高介电常数膜和第三氧化硅膜的第二堆叠， 形成在控制电极层和第一或第二堆叠之间的第二氮化硅膜。 在第三区域中，第二氮化硅膜比第一区域相对薄。

公开(公告)号：US20120126299A1

公开(公告)日：2012-05-24

申请号：US13237486

申请日：2011-09-20

申请人： Kazuhiro MATSUO ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Kazuhiro MATSUO ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L27/04 ,  H01L21/28 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L29/513 ,  H01L29/7883

摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate; a gate insulating film formed above the semiconductor substrate; a charge storage layer formed above the gate insulating film; a multilayered interelectrode insulating film formed in a first region above an upper surface portion of the element isolation insulating film, a second region above a sidewall portion of the charge storage layer and a third region above an upper surface portion of the charge storage layer, the interelectrode insulating film including a stack of an upper silicon oxide film, a middle silicon nitride film, and a lower silicon oxide film; a control gate electrode formed above the interelectrode insulating film; wherein the middle silicon nitride film is thinner in the third region than in the second region and the upper silicon oxide film is thicker in the third region than in the second region.

摘要翻译： 公开了一种半导体器件。 半导体器件包括半导体衬底; 形成在所述半导体衬底上的栅极绝缘膜; 形成在栅极绝缘膜上方的电荷存储层; 形成在元件隔离绝缘膜的上表面部分上方的第一区域中的多层电极间绝缘膜，电荷存储层的侧壁部分上方的第二区域和电荷存储层的上表面部分上方的第三区域， 电极间绝缘膜，其包括上氧化硅膜，中间氮化硅膜和下氧化硅膜的堆叠; 形成在电极间绝缘膜之上的控制栅电极; 其中中间氮化硅膜在第三区域比第二区域薄，上部氧化硅膜在第三区域比第二区域厚。