公开(公告)号：US07065114B2

公开(公告)日：2006-06-20

申请号：US10403032

申请日：2003-04-01

申请人： Hiroyuki Hishiyama

发明人： Hiroyuki Hishiyama

IPC分类号： H01S3/00 ,  H01S3/13

CPC分类号： G11B7/1263

摘要： A simply structured apparatus according to the present invention corrects an overdrive power level. A main controller allows an overdrive power generator to set an overdrive power current to zero, allows a base power controller to control a base power current with the target value of a base power monitor level set to a desired overdrive power level. When the base power monitor level has reached the target value, the main controller allows said overdrive power generator to increase the overdrive power current until a base power control signal monitored by a base power control signal monitor reaches a value corresponding to a desired base power level.

公开(公告)号：US06373313B1

公开(公告)日：2002-04-16

申请号：US09573612

申请日：2000-05-19

申请人： Hiroyuki Hishiyama

发明人： Hiroyuki Hishiyama

IPC分类号： H03H1126

CPC分类号： H03L7/0814 ,  H03K5/133

摘要： The delay time of a variable delay circuit is set to a desired value by: sequentially applying a plurality of clocks of different frequencies to a variable delay circuit; finding, for each clock, the amount of change in delay time with respect to change in a delay time selection signal, which is a signal for setting the delay time of the variable delay circuit; finding a linear coefficient of the characteristic of the delay time of the variable delay circuit with respect to the delay time selection signal from the difference in the amounts of change with respect to the difference in clock frequencies; finding an amount of offset with respect to the delay time selection signal that pertains to the variable delay circuit from the amounts of change and frequencies of the clocks; and finding the delay time selection signal from the linear coefficient and the difference between the desired delay time and the offset amount.

摘要翻译： 可变延迟电路的延迟时间通过以下方式设置为期望值：顺序地将多个不同频率的时钟施加到可变延迟电路; 针对每个时钟，针对作为用于设置可变延迟电路的延迟时间的信号的延迟时间选择信号的变化，求出延迟时间的变化量; 从相对于时钟频率的差异的变化量的差中求出可变延迟电路相对于延迟时间选择信号的延迟时间的特性的线性系数; 根据时钟的变化量和频率，找出相对于可变延迟电路的延迟时间选择信号的偏移量; 并根据线性系数和期望的延迟时间与偏移量之间的差寻找延迟时间选择信号。

公开(公告)号：US5914927A

公开(公告)日：1999-06-22

申请号：US21112

申请日：1998-02-10

申请人： Misao Fukuda ,  Hiroyuki Hishiyama ,  Keishi Ueno ,  Akira Mashimo

发明人： Misao Fukuda ,  Hiroyuki Hishiyama ,  Keishi Ueno ,  Akira Mashimo

IPC分类号： G11B7/00 ,  G11B7/0045 ,  G11B7/005 ,  G11B7/125 ,  G11B20/10 ,  G11B20/18

CPC分类号： G11B7/126 ,  G11B20/10 ,  G11B20/1816 ,  G11B7/005

摘要： An optical disk apparatus having an optical head for reading and writing signals on an optical disk and a signal processing unit for performing predetermined signal processing on the signals is disclosed. The apparatus includes a first controller, a second controller, a detector, and an adjuster. The first controller controls the optical head to write a predetermined signal on a predetermined area of the optical disk with various levels of recording power of the optical head. The second controller reproduces the predetermined signal written on the predetermined area of the optical disk. The detector attempts to detect a predetermined signal pattern having a predetermined period from the reproduced signal with different slice levels. The adjuster determines a resolution of the reproduced signal in accordance with a slice level with which the signal pattern can be detected and automatically adjusts the recording power of the optical head based on the determined resolution.

摘要翻译： 公开了一种具有用于在光盘上读取和写入信号的光学头的光盘装置和用于对信号进行预定信号处理的信号处理单元。 该装置包括第一控制器，第二控制器，检测器和调节器。 第一控制器控制光头以光学头的各种级别的记录功率在光盘的预定区域上写入预定信号。 第二控制器再现写在光盘的预定区域上的预定信号。 检测器尝试从具有不同切片电平的再现信号检测具有预定周期的预定信号图案。 调节器根据可以检测信号图案的限幅电平来确定再现信号的分辨率，并且基于所确定的分辨率自动调节光头的记录功率。