公开(公告)号：US07065142B2

公开(公告)日：2006-06-20

申请号：US10103471

申请日：2002-03-21

申请人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

发明人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

IPC分类号： H04B14/04 ,  H04B14/06 ,  H03M3/00

CPC分类号： H04L27/2626 ,  H04L27/2647

摘要： The present invention is an ADSL encoder and decoder. Wherein, the ADSL encoder comprises a digital signal processor, a buffer, a bit extractor and a constellation point mapper. The digital signal processor delivers data bits to the buffer, and again the delivered data bits are transmitted to the bit extractor by buffer. Bit extractor shifts partial received data bits to an extracted data. The constellation point mapper processes constellation point mapping operation corresponding to the extracted data based on transmitted bits that a sub-carrier can transmit. The ADSL decoder comprises a constellation decoder, a bit packet component and a buffer. The constellation decoder combines a horizontal axis data and a vertical axis data to packed data depending on constellation decoding procedures. The bit packet component stores extracted data to digital data in sequence, and the digital data is stored by buffer in sequence as well, then transmitted to digital signal processor.

公开(公告)号：US07149244B2

公开(公告)日：2006-12-12

申请号：US11222593

申请日：2005-09-09

申请人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

发明人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

IPC分类号： H04B11/38

CPC分类号： H04L27/2626 ,  H04L27/2647

摘要： The present invention is an ADSL encoder and decoder. Wherein, the ADSL encoder comprises a digital signal processor, a buffer, a bit extractor and a constellation point mapper. The digital signal processor delivers data bits to the buffer, and again the delivered data bits are transmitted to the bit extractor by buffer. Bit extractor shifts partial received data bits to an extracted data. The constellation point mapper processes constellation point mapping operation corresponding to the extracted data based on transmitted bits that a sub-carrier can transmit. The ADSL decoder comprises a constellation decoder, a bit packet component and a buffer. The constellation decoder combines a horizontal axis data and a vertical axis data to packed data depending on constellation decoding procedures. The bit packet component stores extracted data to digital data in sequence, and the digital data is stored by buffer in sequence as well, then transmitted to digital signal processor.

公开(公告)号：US20060018373A1

公开(公告)日：2006-01-26

申请号：US11222593

申请日：2005-09-09

申请人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

发明人： Pei-Chieh Hsiao ,  Hsin-Min Wang ,  Huan-Tang Hsieh

IPC分类号： H04B1/38 ,  H04L23/02

CPC分类号： H04L27/2626 ,  H04L27/2647

摘要： The present invention is an ADSL encoder and decoder. Wherein, the ADSL encoder comprises a digital signal processor, a buffer, a bit extractor and a constellation point mapper. The digital signal processor delivers data bits to the buffer, and again the delivered data bits are transmitted to the bit extractor by buffer. Bit extractor shifts partial received data bits to an extracted data. The constellation point mapper processes constellation point mapping operation corresponding to the extracted data based on transmitted bits that a sub-carrier can transmit. The ADSL decoder comprises a constellation decoder, a bit packet component and a buffer. The constellation decoder combines a horizontal axis data and a vertical axis data to packed data depending on constellation decoding procedures. The bit packet component stores extracted data to digital data in sequence, and the digital data is stored by buffer in sequence as well, then transmitted to digital signal processor.

公开(公告)号：US06978338B2

公开(公告)日：2005-12-20

申请号：US10100758

申请日：2002-03-19

申请人： Hsin-Min Wang ,  Huan-Tang Hsieh ,  Chang-Lien Wu ,  Jen-Che Tsai

发明人： Hsin-Min Wang ,  Huan-Tang Hsieh ,  Chang-Lien Wu ,  Jen-Che Tsai

IPC分类号： G06F13/14 ,  G06F13/42 ,  G06F13/20

CPC分类号： G06F13/4221

摘要： The present invention discloses a PCI extended function interface and PCI device using such an interface. The PCI extended function interface is suitable for use in a PCI device comprising a master device and at least one slave device. The PCI extended function interface comprises at least one connecting port and a first circuit. The slave device is coupled to a corresponding connecting port and the PCI extended function interface transmits a control signal through the connecting port to control the operation of a corresponding slave device. The first circuit is used to determine the configuration space.

摘要翻译： 本发明公开了一种使用这种接口的PCI扩展功能接口和PCI设备。 PCI扩展功能接口适用于包括主设备和至少一个从设备的PCI设备。 PCI扩展功能接口包括至少一个连接端口和第一电路。 从设备耦合到对应的连接端口，PCI扩展功能接口通过连接端口发送控制信号，以控制对应的从设备的操作。 第一个电路用于确定配置空间。