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公开(公告)号:US20120299077A1
公开(公告)日:2012-11-29
申请号:US13412863
申请日:2012-03-06
申请人: Jae-Hwang SIM , Jae-Bok Baek
发明人: Jae-Hwang SIM , Jae-Bok Baek
IPC分类号: H01L29/78 , H01L27/088
CPC分类号: H01L21/28 , H01L21/28273 , H01L21/764 , H01L27/11529 , H01L27/11546 , H01L29/7881
摘要: A semiconductor device includes a substrate including a first region and a second region, a gate group disposed in the first region of the substrate, the gate group including a plurality of cell gate patterns and at least one selection gate pattern, a first gate pattern disposed in the second region of the substrate, a group spacer covering a top surface and a side surface of the gate group, the group spacer having a first inflection point, and a first pattern spacer covering a top surface and a side surface of the first gate pattern, the first pattern spacer having a second inflection point.
摘要翻译: 半导体器件包括:衬底,包括第一区域和第二区域;栅极组,设置在衬底的第一区域中,栅极组包括多个单元栅极图案和至少一个选择栅极图案,第一栅极图案布置 在衬底的第二区域中,覆盖栅极组的顶表面和侧表面的组间隔件,具有第一拐点的组间隔件和覆盖第一栅极的顶表面和侧表面的第一图案间隔件 第一图案间隔物具有第二拐点。
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公开(公告)号:US20150371996A1
公开(公告)日:2015-12-24
申请号:US14600577
申请日:2015-01-20
申请人: Jin-Hyun Shin , Jae-Bok Baek
发明人: Jin-Hyun Shin , Jae-Bok Baek
IPC分类号: H01L27/115 , G11C16/26 , G11C16/04 , G11C16/08 , H01L29/788 , H01L29/06
CPC分类号: H01L27/11524 , G11C5/063 , G11C16/0483 , H01L21/764 , H01L29/0649 , H01L29/7883
摘要: A memory device includes an array of floating gate memory cells. Adjacent memory cells are separated by a plurality of air gaps that electrically decouple respective active regions of adjacent memory cells from one another. Additionally, the air gaps electrically decouple an active region of a memory cell from a floating gate of an adjacent memory cell.
摘要翻译: 存储器件包括浮动栅极存储器单元阵列。 相邻的存储器单元被多个气隙隔开,这些气隙将相邻存储器单元的相应有源区彼此电分离。 此外,气隙将存储器单元的有源区域与相邻存储单元的浮动栅极电耦合。
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公开(公告)号:US08680602B2
公开(公告)日:2014-03-25
申请号:US13412863
申请日:2012-03-06
申请人: Jae-Hwang Sim , Jae-Bok Baek
发明人: Jae-Hwang Sim , Jae-Bok Baek
IPC分类号: H01L29/788 , H01L29/76 , H01L21/70 , H01L27/108 , H01L29/94 , H01L21/336 , H01L21/76 , H01L21/3205 , H01L21/4763
CPC分类号: H01L21/28 , H01L21/28273 , H01L21/764 , H01L27/11529 , H01L27/11546 , H01L29/7881
摘要: A semiconductor device includes a substrate including a first region and a second region, a gate group disposed in the first region of the substrate, the gate group including a plurality of cell gate patterns and at least one selection gate pattern, a first gate pattern disposed in the second region of the substrate, a group spacer covering a top surface and a side surface of the gate group, the group spacer having a first inflection point, and a first pattern spacer covering a top surface and a side surface of the first gate pattern, the first pattern spacer having a second inflection point.
摘要翻译: 半导体器件包括:衬底,包括第一区域和第二区域;栅极组,设置在衬底的第一区域中,栅极组包括多个单元栅极图案和至少一个选择栅极图案,第一栅极图案布置 在衬底的第二区域中,覆盖栅极组的顶表面和侧表面的组间隔件,具有第一拐点的组间隔件和覆盖第一栅极的顶表面和侧表面的第一图案间隔件 第一图案间隔物具有第二拐点。
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