公开(公告)号：US20060149883A1

公开(公告)日：2006-07-06

申请号：US11324918

申请日：2006-01-04

Applicant: James Benbow ,  Gary Finley ,  Ravi Chandran ,  Nathan Woods ,  Roman Kononov

Inventor： James Benbow ,  Gary Finley ,  Ravi Chandran ,  Nathan Woods ,  Roman Kononov

IPC: G06F13/14

CPC classification number: H05K1/141 ,  G06F1/184 ,  G06F1/185 ,  G06F1/186 ,  G06F15/7864 ,  H05K2201/049 ,  H05K2201/10212 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: Computing systems with conventional CPUs coupled to co-processors or accelerators implemented in FPGAs (Field Programmable Gate Arrays). One embodiment of the systems and methods according to the invention includes a FPGA accelerator implemented in a computer system by providing an adapter board configured to be used in a standard CPU socket.

Abstract translation: 具有耦合到FPGA（现场可编程门阵列）中实现的协处理器或加速器的常规CPU的计算系统。 根据本发明的系统和方法的一个实施例包括通过提供配置成在标准CPU插槽中使用的适配器板在计算机系统中实现的FPGA加速器。