公开(公告)号：US20190148860A1

公开(公告)日：2019-05-16

申请号：US15941744

申请日：2018-03-30

Applicant: TE CONNECTIVITY CORPORATION ,  TYCO ELECTRONICS JAPAN G.K.

Inventor： Jeffery Walter Mason ,  Takeshi Nakashima ,  Naoki Hashimoto ,  Shigeru Aihara

IPC: H01R12/82 ,  H01R12/70 ,  H01R13/11 ,  H01R13/05 ,  H01R13/24 ,  H05K1/18

CPC classification number: H01R12/79 ,  G06F1/184 ,  H01L23/4006 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4062 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01R12/52 ,  H01R12/585 ,  H01R12/61 ,  H01R12/7005 ,  H01R12/7076 ,  H01R12/716 ,  H01R12/82 ,  H01R12/85 ,  H01R13/057 ,  H01R13/11 ,  H01R13/111 ,  H01R13/2442 ,  H01R13/2464 ,  H01R43/0256 ,  H05K1/0203 ,  H05K1/0243 ,  H05K1/115 ,  H05K1/181 ,  H05K3/3436 ,  H05K7/1084 ,  H05K2201/044 ,  H05K2201/066 ,  H05K2201/10325 ,  H05K2201/10393 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734

Abstract: A socket connector includes a socket substrate having first socket substrate conductors and second socket substrate conductors, receptacle contacts electrically coupled to corresponding first socket substrate conductors and socket contacts electrically coupled to corresponding second socket substrate conductors. The receptacle contacts have receptacles receiving pin contacts of an electronic package and the socket contacts have terminating ends and mating ends with deflectable spring beams terminated to package contacts of the electronic package. At least one of the first socket substrate conductors and the second socket substrate conductors are configured to electrically connect the electronic package with the host circuit board.

公开(公告)号：US20180288876A1

公开(公告)日：2018-10-04

申请号：US15474945

申请日：2017-03-30

Applicant: DELL PRODUCTS, L.P.

Inventor： KEVIN W. MUNDT ,  SANDOR FARKAS ,  BHYRAV M. MUTNURY ,  YESHASWY RAJUPALEPU

IPC: H05K1/18 ,  H01R12/70 ,  H05K1/11 ,  H05K3/40 ,  H01L23/498 ,  H01L21/48

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01R12/7076 ,  H05K1/111 ,  H05K3/4007 ,  H05K2201/10378 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: An information handling system (IHS) has a circuit board assembly with a dual-sided interposer substrate that is inserted between a baseboard and a processor integrated circuit having a second pattern of electrical contacts. The dual interposer substrate formed of a stack of printed circuit boards (PCBs) provides communication channels between a first coupling pad on the baseboard that has a first pattern of electrical contacts and a second coupling pad on top of the dual interposer substrate that provides the second pattern of electrical contacts. The second pattern receives another type of processor integrated circuit than a type supported by the first pattern. Stacked vias formed through the stack of PCBs electrically connect respective electrical contacts of the first and second coupling pads to form a corresponding communication channel. One or more grounded vias mitigate signal integrity (SI) anomalies on the communication channels.

公开(公告)号：US09837369B2

公开(公告)日：2017-12-05

申请号：US15023716

申请日：2013-09-27

Applicant: Renesas Electronics Corporation

Inventor： Yoshikazu Shimote ,  Shinji Baba ,  Toshihiro Iwasaki ,  Kazuyuki Nakagawa

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L23/50 ,  H01L21/78 ,  H05K3/28 ,  H05K3/34 ,  H01L21/683

CPC classification number: H01L24/17 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/562 ,  H01L23/564 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16055 ,  H01L2224/16105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1713 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2224/83104 ,  H01L2224/85 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/2064 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/068 ,  H05K2201/09427 ,  H05K2201/10704 ,  H05K2201/10977 ,  H05K2203/0465 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/45099 ,  H01L2924/207

Abstract: In a semiconductor device (SP1) according to an embodiment, a solder resist film (first insulating layer, SR1) which is in contact with the base material layer, and a resin body (second insulating layer, 4) which is in contact with the solder resist film and the semiconductor chip, are laminated in between the base material layer (2CR) of a wiring substrate 2 and a semiconductor chip (3). In addition, a linear expansion coefficient of the solder resist film is equal to or larger than a linear expansion coefficient of the base material layer, and the linear expansion coefficient of the solder resist film is equal to or smaller than a linear expansion coefficient of the resin body. Also, the linear expansion coefficient of the base material layer is smaller than the linear expansion coefficient of the resin body. According to the above-described configuration, damage of the semiconductor device caused by a temperature cyclic load can be suppressed, and thereby reliability can be improved.

公开(公告)号：US09485864B2

公开(公告)日：2016-11-01

申请号：US14328765

申请日：2014-07-11

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kei Imafuji ,  Katsumi Yamazaki ,  Noritaka Katagiri ,  Teruaki Chino

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K1/111 ,  H01L2224/16225 ,  H05K1/181 ,  H05K3/3426 ,  H05K3/4007 ,  H05K2201/09427 ,  H05K2201/09745 ,  H05K2201/09827 ,  H05K2201/10704 ,  Y02P70/611 ,  Y02P70/613

Abstract: A bump structure provided on an electrode pad includes a solder member, and a metal layer having a cylindrical portion covering a side surface of the solder member, the metal layer being made of a metal which is higher in melting point than the solder member. An upper part of the cylindrical portion of the metal layer is opened wide.

Abstract translation: 设置在电极焊盘上的凸块结构包括焊料构件和金属层，该金属层具有覆盖焊料构件的侧面的圆筒部，金属层由熔点高于焊料构件的金属制成。 金属层的圆筒部的上部开口宽。

公开(公告)号：US20160174373A1

公开(公告)日：2016-06-16

申请号：US14567402

申请日：2014-12-11

Applicant: Intel Corporation

Inventor： Beom-Taek Lee ,  Raul Enriquez Shibayama

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/115 ,  H01R12/585 ,  H01R12/718 ,  H01R31/06 ,  H05K1/147 ,  H05K1/184 ,  H05K2201/10295 ,  H05K2201/10356 ,  H05K2201/10378 ,  H05K2201/10545 ,  H05K2201/1059 ,  H05K2201/10704 ,  H05K2201/10901

Abstract: In one embodiment, the apparatus comprises: a substrate having a first side and a second side, the second side being on an opposite side of the substrate from the first side, where the substrate has a first location on the first side at which an semiconductor package is to be coupled; and a cable coupled to the substrate on the second side of the substrate at a second location on the second side, the second location being at least partially below the first location.

Abstract translation: 在一个实施例中，该装置包括：具有第一侧和第二侧的衬底，第二侧与衬底的与第一侧相反的一侧，其中衬底在第一侧上具有第一位置， 包装要耦合; 以及在所述第二侧上的第二位置处耦合到所述衬底的所述第二侧上的所述衬底的电缆，所述第二位置至少部分地位于所述第一位置的下方。

公开(公告)号：US09155200B2

公开(公告)日：2015-10-06

申请号：US13926069

申请日：2013-06-25

Applicant: Interplex Industries, Inc.

Inventor： Jack Seidler

IPC: H01R9/00 ,  H05K3/00 ,  B23K35/02 ,  H01R43/02 ,  H05K3/34 ,  H01R12/57 ,  H01R12/70

CPC classification number: H05K3/00 ,  B23K35/0244 ,  H01R12/57 ,  H01R12/707 ,  H01R43/0235 ,  H05K3/3426 ,  H05K3/3478 ,  H05K3/3489 ,  H05K2201/0311 ,  H05K2201/10704 ,  H05K2201/10795 ,  H05K2201/1084 ,  H05K2201/10924 ,  H05K2201/10984 ,  H05K2203/0405 ,  H05K2203/0415 ,  Y02P70/613 ,  Y10T29/49147

Abstract: A method of fixing reflowable elements on electrical contacts. The method includes providing a strip having a number of electrical contacts, each contact including a contact body and a tail portion extending away from the contact body. The tail portions of the contacts are then disposed adjacent an elongate reflowable member. The elongate reflowable member is pushed onto the tail portions of the plurality of contacts. Subsequently, the elongate reflowable member is cut into a plurality of separate reflowable elements, each reflowable element corresponding to one of the tail portions. The electrical contacts with the reflowable element attached thereto are separated from the strip.

Abstract translation: 将可回流元件固定在电触点上的方法。 该方法包括提供具有多个电触点的条带，每个触点包括接触体和远离接触体延伸的尾部。 然后将触头的尾部设置在细长的可回流构件附近。 细长的可回流构件被推到多个触点的尾部。 随后，细长可回流构件被切割成多个单独的可回流元件，每个可回流元件对应于尾部中的一个。 与附接到其上的可回流元件的电接触与条分离。

公开(公告)号：US20140283381A1

公开(公告)日：2014-09-25

申请号：US14183725

申请日：2014-02-19

Applicant: FUJITSU LIMITED

Inventor： Yoko MURATA

IPC: H05K3/30

CPC classification number: H05K3/306 ,  H05K3/3447 ,  H05K2201/10704 ,  H05K2203/0182 ,  Y10T29/49139

Abstract: A method of mounting an electronic component includes applying solder paste to a through-hole of a printed board on which an electronic component is mounted, placing the electronic component on the printed board with a restricting member that restricts a terminal of the electronic component from entering the through-hole, the restricting member being sandwiched between the electronic component and the printed board, performing reflow at a temperature at which the restricting member melts, and welding the terminal in the through-hole with the solder paste.

Abstract translation: 一种安装电子部件的方法包括将焊膏涂布到其上安装电子部件的印刷电路板的通孔中，将电子部件放置在印刷电路板上，限制部件限制电子部件的端子进入 所述通孔，所述限制构件夹在所述电子部件和所述印刷基板之间，在所述限制部件熔化的温度下进行回流，并且用所述焊膏将所述端子与所述通孔焊接。

公开(公告)号：US08619420B2

公开(公告)日：2013-12-31

申请号：US13223224

申请日：2011-08-31

Applicant: Brett W. Degner ,  Gregory Tice

Inventor： Brett W. Degner ,  Gregory Tice

IPC: H05K7/20

CPC classification number: G06F1/20 ,  H01L23/4006 ,  H01L23/427 ,  H01L23/473 ,  H01L2924/0002 ,  H05K3/301 ,  H05K7/12 ,  H05K7/20 ,  H05K7/20254 ,  H05K2201/064 ,  H05K2201/10265 ,  H05K2201/10325 ,  H05K2201/10393 ,  H05K2201/10704 ,  H05K2203/0278 ,  Y10T29/49124 ,  Y10T29/49826 ,  Y10T29/53113 ,  H01L2924/00

Abstract: A low profile heat removal system suitable for removing excess heat generated by an integrated circuit operating in a compact computing environment is disclosed.

公开(公告)号：US20130342986A1

公开(公告)日：2013-12-26

申请号：US13533681

申请日：2012-06-26

Applicant: Tsung-Yu Chen ,  Rebecca Shia

Inventor： Tsung-Yu Chen ,  Rebecca Shia

IPC: H05K1/11 ,  H05K3/10 ,  H01L23/48

CPC classification number: H05K1/11 ,  H01L21/4853 ,  H01L21/4885 ,  H01L23/373 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01R13/04 ,  H05K3/103 ,  H05K3/3426 ,  H05K3/4015 ,  H05K5/0069 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10787 ,  H05K2201/10795 ,  H05K2201/1081 ,  H05K2203/1178 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.

Abstract translation: 示出了引脚连接，电子设备和方法的实施例，其包括引脚配置以减少引脚连接操作期间的空隙和引脚倾斜以及其它问题，诸如附接到芯片封装引脚网格阵列。 引脚头被显示为包括诸如凸表面，多个腿和销头表面中的通道的特征。

公开(公告)号：US20120304923A1

公开(公告)日：2012-12-06

申请号：US13464265

申请日：2012-05-04

Applicant: Erik Christian Nicolaas Puik ,  Edwin Johannes Theodorus Smulders

Inventor： Erik Christian Nicolaas Puik ,  Edwin Johannes Theodorus Smulders

IPC: B05C5/04

CPC classification number: H05K3/321 ,  B81C99/002 ,  B81C2203/032 ,  H01L21/6835 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2924/15312 ,  H05K3/28 ,  H05K2201/09472 ,  H05K2201/10704 ,  H05K2203/0178 ,  H05K2203/1105 ,  H05K2203/1121 ,  H05K2203/1446

Abstract: Method and system for moving a frozen adhesive particle towards a target body, comprising launching means (13) which are arranged to launch the particle (2) in its frozen form towards the target body (3, 4) via a movement path (14) through a gap between the launching means and the target body. The medium in the gap may have a temperature above the adhesive particle's melting temperature. The launching means may be arranged to launch the particle at a high speed. The launching means and the target body may have a geometry causing that the movement path is substantially vertical or substantially horizontal.

Abstract translation: 用于将冷冻粘合剂颗粒朝向目标体移动的方法和系统，包括发射装置（13），其布置成经由移动路径（14）将颗粒（2）以冷冻形式朝向目标体（3,4）发射， 通过发射装置和目标体之间的间隙。 间隙中的介质可能具有高于粘合剂颗粒的熔融温度的温度。 发射装置可以被布置成以高速度发射颗粒。 发射装置和目标体可以具有导致运动路径基本上垂直或基本水平的几何形状。