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公开(公告)号:US4236166A
公开(公告)日:1980-11-25
申请号:US54821
申请日:1979-07-05
申请人: Alfred Y. Cho , James V. DiLorenzo
发明人: Alfred Y. Cho , James V. DiLorenzo
IPC分类号: H01L29/06 , H01L29/12 , H01L29/205 , H01L29/78 , H01L29/80 , H01L29/812
CPC分类号: H01L29/7828 , H01L29/8122
摘要: A vertical field effect transistor (10) includes a relatively wide bandgap, lowly doped active layer (18) epitaxially grown on, and substantially lattice matched to, an underlying semiconductor body portion (13). A mesa (20) of lower bandgap material is epitaxially grown on and substantially lattice matched to the active layer. A source electrode (22) is formed on a bottom major surface (34) of the semiconductor body portion, a drain electrode (24) is formed on the top of the mesa, and a pair of gate electrode stripes (26) are formed on the active layer adjacent both sides of the mesa. When voltage (V.sub.G), negative with respect to the drain, is applied to the gate electrodes, the depletion regions (28) thereunder extend laterally in the active layer until they intersect, thereby pinching off the flow of current in the channel extending from the drain and source electrodes. Also described is an embodiment in which spaced-apart, high impedance zones (30) underlie the active layer and the mesas, and the spaces between zones underlie the gate stripes.
摘要翻译: 垂直场效应晶体管(10)包括在下面的半导体主体部分(13)上外延生长并基本上与其基本上晶格匹配的相对较宽的带隙低掺杂有源层(18)。 较低带隙材料的台面(20)外延生长并基本上与有源层晶格匹配。 源电极(22)形成在半导体主体部分的底部主表面(34)上,在台面的顶部形成漏极电极(24),并且一对栅电极条(26)形成在 邻近台面两侧的活动层。 当相对于漏极的负电压(VG)被施加到栅电极时,其下面的耗尽区(28)在有源层中横向延伸,直到它们相交,从而夹紧从沟道延伸的通道中的电流 漏极和源极。 还描述了一种实施例,其中位于有源层和台面之下的间隔开的高阻抗区域(30)以及位于栅极条之下的区域之间的空间。
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公开(公告)号:US4426656A
公开(公告)日:1984-01-17
申请号:US229744
申请日:1981-01-29
申请人: James V. DiLorenzo , James C. Hwang , William C. Niehaus , Wolfgang O. W. Schlosser , Stuart H. Wemple
发明人: James V. DiLorenzo , James C. Hwang , William C. Niehaus , Wolfgang O. W. Schlosser , Stuart H. Wemple
IPC分类号: H01L21/318 , H01L23/29 , H01L23/31 , H01L29/08 , H01L29/812 , H01L29/80
CPC分类号: H01L23/3171 , H01L21/3185 , H01L23/291 , H01L29/0843 , H01L29/812 , H01L2924/0002 , H01L2924/3025
摘要: GaAs FETs exhibit excellent long-term stability if they have a drain ledge, a drain contact with reduced dendrite size, and a silicon nitride passivation layer. Accelerated aging tests at device case temperatures of 250 degrees C. indicate essentially no device failures after 200 hours of observation and a median failure time of approximately 500 hours.
摘要翻译: 如果它们具有漏极凸缘,具有降低的枝晶尺寸的漏极接触和氮化硅钝化层,则GaAs FET具有优异的长期稳定性。 装置外壳温度为250摄氏度时的加速老化试验,在观察200小时后基本没有显示器件故障,中位失效时间约为500小时。
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