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公开(公告)号：US08818308B2
公开(公告)日：2014-08-26
申请号：US12063857
申请日：2006-08-15
IPC分类号： H04B1/18
CPC分类号： H04B1/18 , H03J1/0083
摘要： A multi-tuner apparatus comprises a splitter (S) for received RF signals. The splitter has a splitter output (U) for connection to a plurality of tuners. To reduce signal degradation and dissipation the output impedance of the splitter output is substantially lower than the input impedance of each of the tuners.
摘要翻译： 多调谐器装置包括用于接收的RF信号的分路器（S）。 分路器具有用于连接到多个调谐器的分路器输出（U）。 为了降低信号衰减和耗散，分路器输出的输出阻抗基本上低于每个调谐器的输入阻抗。
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公开(公告)号：US20110261914A1
公开(公告)日：2011-10-27
申请号：US13001894
申请日：2009-07-01
IPC分类号： H04L7/00
CPC分类号： H03C5/00
摘要： The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.
摘要翻译： 本申请涉及一种数字调制器，其包括包括多个单元阵列的输出级和采样级。 本申请还涉及包括所述数字调制器，数字调制方法和计算机程序产品的通信设备。 更具体地，数字调制器包括包括多个单元阵列的输出级，其中输出级包括被配置为接收载波频率信号的至少一个载波频率信号输入端。 数字调制器包括可连接到输出级的采样级，其中采样级被配置为对至少一个数据输入信号进行过采样。 数字调制器包括至少一个采样时钟产生装置，其被配置为根据排列的单元阵列的数量和载波频率信号产生至少一个采样时钟信号。
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3.发明申请HARMONIC REJECTION MIXER UNIT AND METHOD FOR PERFORMING A HARMONIC REJECTION MIXING 有权谐波抑制混合器单元和执行谐波抑制混合的方法公开(公告)号：US20100283526A1
公开(公告)日：2010-11-11
申请号：US12671734
申请日：2008-07-30
CPC分类号： H03D7/1441 , H03D7/145 , H03D7/1458 , H03D7/1466 , H03D7/1483 , H03D7/165 , H03D7/166 , H03D7/18 , H03D2200/0086
摘要： A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T3a, T3b; T4a, T4b) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS1-GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS1-GS4) from a local oscillator signal (LO). The transistor control signals (GS3, GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) are generated with a duty cycle of
摘要翻译： 提供了一种谐波抑制混频器单元，其包括输入（RF），至少一个具有至少两个晶体管单元（T3a，T3b; T4a，T4b）的谐波抑制单元（HRU），用于将来自输入（RF） 具有乘法信号（ELO）。 谐波抑制混频器单元还包括晶体管控制信号生成单元（GGU），用于产生用于至少一个谐波抑制单元的至少两个晶体管单元（T3a，T3b; T4a，T4b）的晶体管控制信号（GS1-GS4） （HR1）通过从本地振荡器信号（LO）导出晶体管控制信号（GS1-GS4）。 以占空比<50％生成用于至少两个晶体管单元（T3a，T3b; T4a，T4b）的晶体管控制信号（GS3，GS4），并产生使得乘法信号ELO的形状得以实现 通过来自晶体管单元（T3a，T3b; T4a，T4b）的输出信号的构造求和。 产生晶体管控制信号（GS1-GS4），使得只执行来自具有相同符号或零的晶体管单元的输出信号的总和。
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公开(公告)号：US20100253412A1
公开(公告)日：2010-10-07
申请号：US12738297
申请日：2008-10-29
申请人： Johannes H.A. Brekelmans , Gerben W. De Jong , Rachid El Waffaoui , Dennis Jeurissen , Jan Van Sinderen , Simon WK Lee
发明人： Johannes H.A. Brekelmans , Gerben W. De Jong , Rachid El Waffaoui , Dennis Jeurissen , Jan Van Sinderen , Simon WK Lee
IPC分类号： G06G7/14
CPC分类号： H03D7/165 , H03D7/18 , H03D2200/0082 , H03D2200/0086
摘要： An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.
摘要翻译： 一种包括无源谐波抑制混频器的电子设备。 无源谐波抑制混频器具有连接到多个子混频器级的输入，并且子混频器级连接到用于产生输出的求和模块。 每个子混合级包括门控模块和相应的放大器，门控模块适于在控制信号的控制下选择性地传递具有反相极性的输入信号或输入信号。
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公开(公告)号：US20080013656A1
公开(公告)日：2008-01-17
申请号：US11628908
申请日：2005-05-25
申请人： Jan Van Sinderen , Marc Notten
发明人： Jan Van Sinderen , Marc Notten
IPC分类号： H03D1/04
CPC分类号： H03H7/21 , H03H2007/0192 , H03J2200/28
摘要： A signal processing arrangement (REC) comprises a filter (PPF) with variable filter elements (FE). A switching circuit (SWCT) switches a filter element (FE1) and, subsequently, another filter element (FE3) from a filter state to an adjustment state and back again to the filter state. A filter element that is in the filter state contributes to a suppression of unwanted signals. A filter element that is in the adjustment state affects a characteristic of a measurement signal (Sm). An adjustment circuit (ADCT) adjusts the filter element that is in the adjustment state so that the characteristic of the measurement signal is substantially equal to a target value (TV).
摘要翻译： 信号处理装置（REC）包括具有可变滤波器元件（FE）的滤波器（PPF）。 开关电路（SWCT）将滤波器元件（FE 1）和随后的另一滤波器元件（FE 3）从滤波器状态切换到调整状态并再次返回到滤波器状态。 处于滤波器状态的滤波器元件有助于抑制不需要的信号。 处于调整状态的过滤元件影响测量信号（Sm）的特性。 调整电路（ADCT）调整处于调整状态的滤波器元件，使得测量信号的特性基本上等于目标值（TV）。
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公开(公告)号：US20050176392A1
公开(公告)日：2005-08-11
申请号：US10516548
申请日：2003-06-05
CPC分类号： H04B17/318
摘要： A receiver signal strength indication circuit comprises circuitry (A1-A4) for discretely controlled amplifying an input signal, and circuitry (NF, log, ADC) coupled to an output of the amplifying circuitry (A1-A4) for furnishing a receiver signal strength indication.
摘要翻译： 接收机信号强度指示电路包括用于离散地控制放大输入信号的电路（A 1 -A 4）和耦合到放大电路（A 1 -A 4）的输出的电路（NF，log，ADC），用于提供 接收机信号强度指示。
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公开(公告)号：US20120105128A1
公开(公告)日：2012-05-03
申请号：US13266744
申请日：2010-04-23
申请人： Dennis Jeurissen , Gerben Willem de Jong , Jan van Sinderen , Johannes Hubertus Antonius Brekelmans
发明人： Dennis Jeurissen , Gerben Willem de Jong , Jan van Sinderen , Johannes Hubertus Antonius Brekelmans
IPC分类号： G06G7/12
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/1483 , H03D7/1491 , H03D2200/0086
摘要： An electronic device comprising a passive harmonic-rejection mixer (400) and a calibration circuitry (425). The passive harmonic rejection mixer has an input (102) connected to several sub-mixer stages (402), and the sub-mixer stages are connected to a summing module (406, 408) for generating the output (104). Each sub-mixing stage comprises a gating module (414), an amplifier (416), and a weighting module (418), the gating module selectively passing the input signal or the input signal with inverted polarity under the control of control signals. The calibration circuitry (425) is adapted to input a reference signal (430) to the input of the mixer, receive an output signal (104) from the output of the mixer, and set the weights (K1, K2, K3, K4) of the weighting modules to make the output signal match an expected output signal.
摘要翻译： 一种包括无源谐波抑制混频器（400）和校准电路（425）的电子设备。 无源谐波抑制混频器具有连接到多个子混频器级（402）的输入（102），并且子混频器级连接到用于产生输出（104）的求和模块（406,408）。 每个子混合级包括门控模块（414），放大器（416）和加权模块（418），门控模块在控制信号的控制下选择性地使输入信号或具有反相极性的输入信号。 校准电路（425）适于将参考信号（430）输入到混频器的输入端，从混频器的输出接收输出信号（104），并设定权重（K1，K2，K3，K4） 的加权模块以使输出信号匹配期望的输出信号。
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公开(公告)号：US20110164702A1
公开(公告)日：2011-07-07
申请号：US13062330
申请日：2009-08-24
申请人： Nenad Pavlovic , Manel Collados , Xin He , Jan Van Sinderen
发明人： Nenad Pavlovic , Manel Collados , Xin He , Jan Van Sinderen
IPC分类号： H04L27/00
CPC分类号： H04L27/361 , H04L27/2627 , H04L2027/0018 , H04L2027/0067
摘要： The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.
摘要翻译： 本申请涉及至少一个数字控制振荡器和数据调制装置。 更具体地，数字极化发射器包括被配置为产生至少一个频率的至少一个数字控制振荡器。 数字极性发射机包括数据调制装置，其中数据调制装置包括至少一个数据输入端，至少一个输出端和至少一个频率输入端，其中输出端与数控振荡器相连。 数字极性发射机包括相位测量装置，其被配置为针对每个频率样本从数据调制装置的输出信号测量相位信息。 数字极性发射机包括相位误差检测装置，其被配置为至少根据所测量的相位信息检测相位误差，其中相位误差检测装置被配置为将检测到的相位误差应用于数据调制装置的输出信号。
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9.发明申请OUTPUT STAGE FOR A DIGITAL RF TRANSMITTER, METHOD FOR PROVIDING AN RF OUTPUT SIGNAL IN A DIGITAL RF TRANSMITTER, AND DIGITAL RF TRANSMITTER 有权用于数字RF发射机的输出级，用于在数字RF发射机中提供RF输出信号的方法和数字RF发射机公开(公告)号：US20110050344A1
公开(公告)日：2011-03-03
申请号：US12921572
申请日：2009-03-09
IPC分类号： H03F3/26
CPC分类号： H04B1/0483
摘要： An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.
摘要翻译： 提供了一种用于数字RF发射器的输出级（1）。 输出级包括：适于接收要发送的输入信号（RFin，b7-b0）的输入; 多个N个功率放大部分（S1，S2，S3，S4）; 以及提供输出电压信号的输出（A，B）。 N个功率放大部分（S1，S2，S3，S4）中的每一个被布置成接收输入信号（RFin，b7-b0），并且包括适于提供相应输出信号的变压器（T1，T2，T3，T4） 。 每个变压器包括初级和次级级; N个功率放大部（S1，S2，S3，S4）的变压器（T1，T2，T3，T4）的次级组合，从而提供输出级的组合输出电压信号。 N个功率放大部分（S1，S2，S3，S4）被适配成使得输入信号（RFin，b7-b0）被包括不同相位的时钟信号（clock1，clock2，clock3，clock4）锁存。
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公开(公告)号：US07750866B2
公开(公告)日：2010-07-06
申请号：US11915812
申请日：2006-05-16
CPC分类号： H01Q7/00
摘要： An antenna assembly for wireless communication equipment comprises an antenna structure comprising at least a loop type antenna arranged to deliver a first current when it is used in a balanced mode and/or a second current when it is used in an unbalanced mode with respect to a ground plane from received radio signals, and current extraction device coupled to the antenna structure and arranged to be placed in at least a first state in which the current extraction device delivers the first or second current and a second state in which the current extraction device simultaneously delivers the first and second currents either separately or mixed together.
摘要翻译： 一种用于无线通信设备的天线组件包括天线结构，该天线结构包括至少一个环形天线，该环形天线布置成当以平衡模式使用时递送第一电流和/或第二电流，当其以相对于 所接收的无线电信号的接地平面和耦合到天线结构的电流提取装置，并布置成至少放置在当前提取装置传送第一或第二电流的第一状态和当前提取装置同时进行的第二状态 将第一和第二电流分开或混合在一起。
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