公开(公告)号：US5872028A

公开(公告)日：1999-02-16

申请号：US708712

申请日：1996-09-05

申请人： Joseph Andrew Yedinak ,  Anup Bhalla ,  Jeffrey Allen Webster ,  Joseph Leonard Cumbo

发明人： Joseph Andrew Yedinak ,  Anup Bhalla ,  Jeffrey Allen Webster ,  Joseph Leonard Cumbo

IPC分类号： H01L29/78 ,  H01L21/22 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L21/332

CPC分类号： H01L29/66333 ,  H01L21/2205 ,  H01L29/7395

摘要： A method of manufacturing a semiconductor device and device in which a sacrificial N shelf layer is grown on a P+ semiconductor substrate to contain the out-diffusion of dopant from the substrate. An N+ buffer layer is grown on the N shelf layer and an N- epitaxial layer is grown on the N+ buffer layer. The presence of the N shelf layer, which is consumed by the substrate dopant during further device fabrication, allows the integrated dopant level of the N+ buffer layer to be accurately controlled in the finished device.

摘要翻译： 一种半导体器件和器件的制造方法，其中在P +半导体衬底上生长牺牲N搁架层以包含来自衬底的掺杂剂的扩散。 在N层上生长N +缓冲层，在N +缓冲层上生长N外延层。 在进一步的器件制造期间由衬底掺杂剂消耗的N层层的存在允许在最终器件中精确地控制N +缓冲层的集成掺杂剂水平。

公开(公告)号：US06211550B1

公开(公告)日：2001-04-03

申请号：US09339356

申请日：1999-06-24

申请人： Thomas Eugene Grebs ,  Rodney Sylvester Ridley, Sr. ,  Jeffrey P. Spindler ,  Joseph Leonard Cumbo ,  Jeffrey Edward Lauffer

发明人： Thomas Eugene Grebs ,  Rodney Sylvester Ridley, Sr. ,  Jeffrey P. Spindler ,  Joseph Leonard Cumbo ,  Jeffrey Edward Lauffer

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L23/4827 ,  H01L29/456 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a source region and a gate disposed at the upper surface of a silicon substrate, which includes a drain region for the device. On the lower surface of the substrate is disposed a backmetal drain terminal comprising a stack that includes a first layer of tantalum and an outermost second layer of copper.

摘要翻译： 半导体器件包括源极区域和设置在硅衬底的上表面处的栅极，其包括用于器件的漏极区域。 在衬底的下表面上设置一个后金属漏极端子，其包括一个包括第一钽层和最外层的第二层的叠层。