Method and system for providing temporal threshold support during performance monitoring of a pipelined processor
    1.
    发明授权
    Method and system for providing temporal threshold support during performance monitoring of a pipelined processor 有权
    用于在流水线处理器的性能监视期间提供临时阈值支持的方法和系统

    公开(公告)号:US06446029B1

    公开(公告)日:2002-09-03

    申请号:US09343449

    申请日:1999-06-30

    IPC分类号: G06F1500

    摘要: A method and system for monitoring the performance of a instruction pipeline is provided. The processor may contain a performance monitor for monitoring for the occurrence of an event within a data processing system. An event to be monitored may be specified through software control, and the occurrence of the specified event is monitored during the execution of an instruction in the execution pipeline of the processor. A particular instruction may be specified to execute within a threshold time for each stage of the instruction pipeline. The specified event may be the completion of a single tagged instruction beyond the specified threshold interval for a stage of the instruction pipeline. The performance monitor may contain a number of counters for counting multiple occurrences of specified events during the execution of multiple instructions, in which case the specified events may be the completion of tagged instructions beyond a threshold interval for any stage of the multiple stages of the execution pipeline. As the instruction moves through the processor, the performance monitor collects the events and provides the events for optimization analysis.

    摘要翻译: 提供了一种用于监视指令流水线性能的方法和系统。 处理器可以包含用于监视数据处理系统内的事件发生的性能监视器。 可以通过软件控制指定要监视的事件,并且在执行处理器的执行流水线中的指令期间监视指定事件的发生。 可以指定特定指令以在指令流水线的每个阶段的阈值时间内执行。 指定的事件可以是超出指令流水线阶段的指定阈值间隔的单个标记指令的完成。 性能监视器可以包含多个计数器,用于在执行多个指令期间对多次发生的指定事件进行计数,在这种情况下,指定事件可以是执行多个执行阶段的任何阶段的阈值间隔之外的已标记指令的完成 管道。 当指令移动通过处理器时,性能监视器收集事件并提供事件进行优化分析。

    Method and system for tracking the progress of an instruction in an out-of-order processor
    2.
    发明授权
    Method and system for tracking the progress of an instruction in an out-of-order processor 失效
    用于跟踪无序处理器中的指令进度的方法和系统

    公开(公告)号:US06415378B1

    公开(公告)日:2002-07-02

    申请号:US09343359

    申请日:1999-06-30

    IPC分类号: G06F1100

    CPC分类号: G06F11/3466

    摘要: A method and system for debugging the execution of an instruction within an instruction pipeline is provided. A processor in a data processing system contains instruction pipeline units. An instruction may be tagged, and in response to an instruction pipeline unit completing its processing of the tagged instruction, a stage completion signal is asserted. An execution monitor external to the pipelined processor monitors the stage completion signals during the execution of the tagged instruction. The execution monitor may be a logic analyzer that displays the stage completion signals in real-time on a display device of the execution monitor. An instruction to be tagged may be selected based upon an instruction selection rule, such as the address of the instruction.

    摘要翻译: 提供了一种用于调试指令管线内的指令执行的方法和系统。 数据处理系统中的处理器包含指令流水线单元。 指令可以被标记,并且响应于指令流水线单元完成其对带标签的指令的处理,声明级完成信号。 流水线处理器外部的执行监视器在执行标记指令期间监视阶段完成信号。 执行监视器可以是在执行监视器的显示装置上实时显示级完成信号的逻辑分析器。 可以基于诸如指令的地址的指令选择规则来选择要被标记的指令。