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公开(公告)号:US07020582B1
公开(公告)日:2006-03-28
申请号:US10833384
申请日:2004-04-28
申请人: John M. Dicosola , Adam Wright , Junzhao J. Lei , Mark A. Banke , William Hata
发明人: John M. Dicosola , Adam Wright , Junzhao J. Lei , Mark A. Banke , William Hata
CPC分类号: G01R31/2894 , G01R31/2831
摘要: Systems and methods are provided for marking integrated circuit defects on wafers to facilitate failure analysis. A wafer containing integrated circuits can be tested using a tester. Test data from the tester can be analyzed using integrated circuit design files to identify suspected faults. A fault location program can be used to identify the physical location of the faults. The fault location program uses information on the faults identified and CAD file information on the physical layout of the integrated circuit to map identified faults to actual physical positions. The fault location program may also generate laser control files. The laser control files can be used to control a laser system so that the laser system creates laser marks on the wafer surrounding each of the faults. The marked faults can be polished and examined under an electron microscope or analyzed using other failure analysis tools.
摘要翻译: 提供了系统和方法,用于在晶圆上标记集成电路缺陷以便于故障分析。 含有集成电路的晶片可以使用测试仪进行测试。 可以使用集成电路设计文件分析来自测试仪的测试数据,以识别可疑故障。 故障定位程序可用于识别故障的物理位置。 故障定位程序使用关于所识别的故障的信息和关于集成电路的物理布局的CAD文件信息来将所识别的故障映射到实际的物理位置。 故障定位程序还可以生成激光控制文件。 激光控制文件可用于控制激光系统,使得激光系统在围绕每个故障的晶片上产生激光标记。 标记的故障可以在电子显微镜下抛光和检查,或使用其他故障分析工具进行分析。