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公开(公告)号:US06847646B1
公开(公告)日:2005-01-25
申请号:US09017096
申请日:1998-02-02
IPC分类号: H04Q3/00 , H04L12/70 , H04L12/931 , H04L12/933 , H04L12/56
CPC分类号: H04L49/103 , H04L49/108 , H04L49/20 , H04L49/50 , H04L2012/5647 , H04L2012/5651 , H04L2012/5657 , H04L2012/5658 , H04L2012/5682
摘要: A coupling device (switch) for a local network operating in the asynchronous transfer mode (ATM) which comprises a central cell memory (CCM) for buffer storage of packets (frames) formed by individual ATM cells and arriving on feed lines, a central memory control device for controlling the storage in the central cell memory (CCM) and the writing and reading processes of the packets into and from the central cell memory (CCM). The control device includes a counting circuit for counting the ATM cells arriving in the central cell memory (CCM) and a discarding circuit for discarding ATM cells packet by packet for preventing a congestion in the central cell memory (CCM). To enable an efficient buffer management also in the case of very small cell memories, in particular below 1000 cells, the central memory control device comprises at least one comparator device connected upstream of the central cell memory, which comparator device cooperates with the counting circuit and with a control logic such that, when a programmable threshold value (Ldisc) for the degree of filling of the central cell memory (CCM) is reached, a programmable number of links (VC) are defined on the basis of the sequence of arrival of the ATM cells assigned to the relevant link (VC), and in that each ATM cell of the packet belonging to the defined VC value is discarded before it arrives in the central cell memory.
摘要翻译: 一种用于在异步传输模式(ATM)中工作的本地网络的耦合设备(交换机),其包括用于缓冲存储由各ATM单元形成并到达馈线的分组(帧)的中央单元存储器(CCM),中央存储器 用于控制中央单元存储器(CCM)中的存储的控制装置以及来自中央单元存储器(CCM)的分组的写入和读取处理。 控制装置包括用于对到达中央单元存储器(CCM)的ATM单元进行计数的计数电路和用于逐个地逐个丢弃ATM信元的废弃电路,以防止中央单元存储器(CCM)中的拥塞。 为了在非常小的单元存储器(特别是小于1000个单元)的情况下也能够实现高效的缓冲器管理,中央存储器控制设备包括连接到中央单元存储器上游的至少一个比较器设备,比较器设备与计数电路配合, 具有控制逻辑,使得当达到用于中央单元存储器(CCM)的填充程度的可编程阈值(Ldisc)时,基于到达的顺序来定义可编程数量的链接(VC) 分配给相关链路(VC)的ATM信元,并且属于定义的VC值的分组的每个ATM信元在其到达中央信元存储器之前被丢弃。