公开(公告)号：US5789622A

公开(公告)日：1998-08-04

申请号：US712757

申请日：1996-09-12

申请人： Bill H. Quon ,  Paul S. Lee ,  Steven W. Fornaca ,  Karen E. Yokoyama

发明人： Bill H. Quon ,  Paul S. Lee ,  Steven W. Fornaca ,  Karen E. Yokoyama

IPC分类号： G01J1/44 ,  H04N5/33 ,  G01J5/10

CPC分类号： H04N5/3655 ,  H04N5/33 ,  H04N5/349

摘要： A method of calibrating gains and offsets for a two-dimensional detector array 10 comprising individual detector elements 14, including: (a) focusing a first incoming image signal at a first power level onto the detector array 10; (b) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the first power level; (c) for each detector element 14, translating the first incoming image signal by a detector element distance onto an adjacent detector element; (d) reading the corresponding electrical signal from the detector elements 14 as a second image frame at the first power level; (e) focusing a second incoming image signal at a second power level onto the detector array 10; (f) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the second power level; (g) for each detector element 14, translating the second incoming image signal by a detector element distance onto an adjacent detector element; (h) reading the corresponding electrical signals from the detector elements 14 as a second image frame at the second power level; (i) selecting a reference detector element 18; (j) determining the gain of detector elements adjacent to the reference detector element 18; and (k) determining the offset of the adjacent detector elements 14.

摘要翻译： 校准包括各个检测器元件14的二维检测器阵列10的增益和偏移的方法，包括：（a）将第一输入图像信号以第一功率电平聚焦到检测器阵列10上; （b）从作为第一功率电平的第一图像帧的检测器元件14读取相应的电信号; （c）对于每个检测器元件14，将第一输入图像信号通过检测器元件距离平移到相邻的检测器元件上; （d）将来自检测器元件14的对应的电信号作为第一功率电平的第二图像帧读取; （e）将第二输入图像信号以第二功率电平聚焦到检测器阵列10上; （f）将来自检测器元件14的对应的电信号作为第二功率电平的第一图像帧读取; （g）对于每个检测器元件14，将第二输入图像信号通过检测器元件距离平移到相邻的检测器元件上; （h）以第二功率电平读取来自检测器元件14的对应的电信号作为第二图像帧; （i）选择参考检测器元件18; （j）确定与参考检测器元件18相邻的检测器元件的增益; 和（k）确定相邻检测器元件14的偏移。

公开(公告)号：US6050476A

公开(公告)日：2000-04-18

申请号：US156452

申请日：1998-09-19

申请人： Karen E. Yokoyama ,  Gershon Akerling

发明人： Karen E. Yokoyama ,  Gershon Akerling

IPC分类号： B23K20/00 ,  H01L21/48 ,  H01L21/60 ,  H01L21/603 ,  H01L21/66 ,  H01L23/538

CPC分类号： H01L23/5382 ,  H01L21/485 ,  H01L22/20 ,  H01L24/75 ,  H01L2224/13109 ,  H01L2224/16 ,  H01L2224/81193 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30107

摘要： A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.

公开(公告)号：US5920464A

公开(公告)日：1999-07-06

申请号：US935267

申请日：1997-09-22

申请人： Karen E. Yokoyama ,  Gershon Akerling

发明人： Karen E. Yokoyama ,  Gershon Akerling

IPC分类号： B23K20/00 ,  H01L21/48 ,  H01L21/60 ,  H01L21/603 ,  H01L21/66 ,  H01L23/538 ,  H05K1/11 ,  B23K20/12 ,  H05K1/14

CPC分类号： H01L23/5382 ,  H01L21/485 ,  H01L22/20 ,  H01L24/75 ,  H01L2224/13109 ,  H01L2224/16 ,  H01L2224/81193 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30107

摘要： A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.

公开(公告)号：US06216941B1

公开(公告)日：2001-04-17

申请号：US09478255

申请日：2000-01-06

申请人： Karen E. Yokoyama ,  Gershon Akerling ,  Moshe Sergant

发明人： Karen E. Yokoyama ,  Gershon Akerling ,  Moshe Sergant

IPC分类号： B23K3100

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  Y10T29/49014

摘要： A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of the chip and the surface of the substrate over the metal layers, to form a pattern of electrically conductive bumps having spongy and dendritic properties, placing the chip in aligned contact with the substrate where each electrically conductive chip bump mates with each corresponding electrically conductive substrate bump, and selectively applying heat and pressure to the chip and substrate causing each chip bump to fuse together with each corresponding substrate bump to form an electromechanical bond.

摘要翻译： 描述了在脆性芯片和衬底之间形成高频连接的方法，其中金属被选择性地沉积在芯片的表面和衬底的表面上，并且相应的导电凸块的图案被选择性地蒸发在 芯片和衬底在金属层上的表面，以形成具有海绵状和树枝状特性的导电凸块的图案，将芯片与衬底对准接触，其中每个导电芯片凸块与每个相应的导电衬底凸块配合， 并且选择性地向芯片和衬底施加热和压力，使得每个芯片凸块与每个相应的衬底凸块熔合在一起以形成机电结合。

公开(公告)号：US6032852A

公开(公告)日：2000-03-07

申请号：US156447

申请日：1998-09-19

申请人： Karen E. Yokoyama ,  Gershon Akerling

发明人： Karen E. Yokoyama ,  Gershon Akerling

IPC分类号： B23K20/00 ,  H01L21/48 ,  H01L21/60 ,  H01L21/603 ,  H01L21/66 ,  H01L23/538 ,  H01L21/50

CPC分类号： H01L23/5382 ,  H01L21/485 ,  H01L22/20 ,  H01L24/75 ,  H01L2224/13109 ,  H01L2224/16 ,  H01L2224/81193 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30107

摘要： A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.

摘要翻译： 可再加工的冷焊微电子多芯片模块包含冷焊微电子芯片，其中芯片的冷焊接金属焊盘（3）由具有一个硬度的金属和多芯片模块衬底的相应的冷焊接金属焊盘构成（ 5）具有不同的较高硬度，尽管硬度差异，但彼此之间的冷焊接。 两种形式的铟优选用作金属。 如果由于任何原因，芯片必须从模块中移除，则发现冷焊缝在可预测的位置处断裂。 因此，可以将新的微电子芯片作为替代物冷焊到模块基板。 从而使新的返修和测试程序成为可能。