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公开(公告)号:US07955880B2
公开(公告)日:2011-06-07
申请号:US12481870
申请日:2009-06-10
IPC分类号: H01L21/00
CPC分类号: H01S5/2231 , H01S5/2214 , H01S5/3235 , H01S2304/04
摘要: A method of producing a semiconductor optical device includes a first step of growing a stacked semiconductor layer including a first III-V group compound semiconductor layer for an active layer on a substrate; a second step of forming a silicon oxide film on the stacked semiconductor layer, the silicon oxide film having a predetermined film stress and a predetermined thickness; a third step of forming a strip-shaped groove in the silicon oxide film by etching the silicon oxide film, using a resist pattern formed on the silicon oxide film, until a surface of the stacked semiconductor layer is exposed; and a fourth step of growing a second III-V group compound semiconductor layer in the groove using the silicon oxide film as a selective mask.
摘要翻译: 一种制造半导体光学器件的方法包括:在衬底上生长包括用于有源层的第一III-V族化合物半导体层的堆叠半导体层的第一步骤; 在叠层半导体层上形成氧化硅膜的第二步骤,具有预定膜应力和预定厚度的氧化硅膜; 第三步骤,通过使用形成在氧化硅膜上的抗蚀图案,通过蚀刻氧化硅膜在氧化硅膜上形成条形槽,直到层叠半导体层的表面露出为止; 以及使用氧化硅膜作为选择性掩模在槽内生长第二III-V族化合物半导体层的第四步骤。
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公开(公告)号:US07781245B2
公开(公告)日:2010-08-24
申请号:US12318701
申请日:2009-01-06
CPC分类号: H01S5/3434 , B82Y20/00 , H01S5/2224 , H01S5/2275 , H01S2304/04
摘要: A process for the semiconductor laser diode is disclosed, which prevents the abnormal growth occurred at the second growth for the burying region of the buried hetero structure. The ICP (Induction-Coupled Plasma) CVD apparatus forms a silicon oxide file with a thickness of above 2 μm as adjusting the bias power PBIAS. Patterning the silicon oxide mask and dry-etching the semiconductor layers, a mesa structure including the active layer may be formed. As leaving the patterned silicon oxide film, the second growth for the burying region buries the mesa structure. The residual stress of the silicon oxide film is −250 to −150 MPa at a room temperature, while, it is −200 to 100 MPa at temperatures from 500 to 700° C.
摘要翻译: 公开了一种用于半导体激光二极管的方法,其防止在埋入异质结构的掩埋区域的第二次生长时发生异常生长。 ICP(感应耦合等离子体)CVD装置,通过调整偏置功率PBIAS,形成厚度大于2μm的氧化硅文件。 对氧化硅掩模进行构图并干蚀刻半导体层,可以形成包括有源层的台面结构。 离开图案化氧化硅膜时,埋藏区域的第二次生长掩埋了台面结构。 氧化硅膜的残余应力在室温下为-250〜-150MPa,而在500〜700℃的温度下为-200〜100MPa。
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公开(公告)号:US20090317929A1
公开(公告)日:2009-12-24
申请号:US12481870
申请日:2009-06-10
IPC分类号: H01L33/00
CPC分类号: H01S5/2231 , H01S5/2214 , H01S5/3235 , H01S2304/04
摘要: A method of producing a semiconductor optical device includes a first step of growing a stacked semiconductor layer including a first III-V group compound semiconductor layer for an active layer on a substrate; a second step of forming a silicon oxide film on the stacked semiconductor layer, the silicon oxide film having a predetermined film stress and a predetermined thickness; a third step of forming a strip-shaped groove in the silicon oxide film by etching the silicon oxide film, using a resist pattern formed on the silicon oxide film, until a surface of the stacked semiconductor layer is exposed; and a fourth step of growing a second III-V group compound semiconductor layer in the groove using the silicon oxide film as a selective mask.
摘要翻译: 一种制造半导体光学器件的方法包括:在衬底上生长包括用于有源层的第一III-V族化合物半导体层的堆叠半导体层的第一步骤; 在叠层半导体层上形成氧化硅膜的第二步骤,具有预定膜应力和预定厚度的氧化硅膜; 第三步骤,通过使用形成在氧化硅膜上的抗蚀图案,通过蚀刻氧化硅膜在氧化硅膜上形成条形槽,直到层叠半导体层的表面露出为止; 以及使用氧化硅膜作为选择性掩模在槽内生长第二III-V族化合物半导体层的第四步骤。
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公开(公告)号:US20090209055A1
公开(公告)日:2009-08-20
申请号:US12318701
申请日:2009-01-06
IPC分类号: H01L33/00
CPC分类号: H01S5/3434 , B82Y20/00 , H01S5/2224 , H01S5/2275 , H01S2304/04
摘要: A process for the semiconductor laser diode is disclosed, which prevents the abnormal growth occurred at the second growth for the burying region of the buried hetero structure. The ICP (Induction-Coupled Plasma) CVD apparatus forms a silicon oxide file with a thickness of above 2 μm as adjusting the bias power PBIAS. Patterning the silicon oxide mask and dry-etching the semiconductor layers, a mesa structure including the active layer may be formed. As leaving the patterned silicon oxide film, the second growth for the burying region buries the mesa structure. The residual stress of the silicon oxide film is −250 to −150 MPa at a room temperature, while, it is −200 to 100 MPa at temperatures from 500 to 700° C.
摘要翻译: 公开了一种用于半导体激光二极管的方法,其防止在埋入异质结构的掩埋区域的第二次生长时发生异常生长。 ICP(感应耦合等离子体)CVD装置形成厚度大于2μm的氧化硅文件,以调整偏置功率PBIAS。 对氧化硅掩模进行构图并干蚀刻半导体层,可以形成包括有源层的台面结构。 离开图案化氧化硅膜时,埋藏区域的第二次生长掩埋了台面结构。 氧化硅膜的残余应力在室温下为-250〜-150MPa,而在500〜700℃的温度下为-200〜100MPa。
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