公开(公告)号：US07260759B1

公开(公告)日：2007-08-21

申请号：US10869698

申请日：2004-06-16

申请人： Kamran Zarrineh ,  Kenneth A. House ,  Syed A. Obaidulla

发明人： Kamran Zarrineh ,  Kenneth A. House ,  Syed A. Obaidulla

IPC分类号： G01R31/28

CPC分类号： G01R31/3187

摘要： A memory BIST architecture provides an efficient communication interface between external agents, e.g., external tester and a memory BIST module. The memory BIST architecture reduces diagnostics efforts by dividing the search space and allowing the test and debug to be concentrated on the failing memory. The memory BIST architecture is divided into two levels, a memory BIST sequencer level and a satellite memory BIST module. The memory BIST sequencer level includes a set of registers that provide an interface between external agents attempting to communicate with the MBIST module and the Satellite MBIST module.

摘要翻译： 存储器BIST架构在外部代理（例如外部测试器和存储器BIST模块）之间提供有效的通信接口。 内存BIST架构通过划分搜索空间来减少诊断工作，并允许测试和调试集中在故障存储器上。 存储器BIST架构被分为两个级别，一个存储器BIST定序器级和一个卫星存储器BIST模块。 存储器BIST定序器级别包括一组寄存器，其提供尝试与MBIST模块和卫星MBIST模块通信的外部代理之间的接口。

公开(公告)号：US06996491B2

公开(公告)日：2006-02-07

申请号：US10079476

申请日：2002-02-19

申请人： Spencer M. Gold ,  Claude R. Gauthier ,  Steven R. Boyle ,  Kenneth A. House ,  Joseph Siegel

发明人： Spencer M. Gold ,  Claude R. Gauthier ,  Steven R. Boyle ,  Kenneth A. House ,  Joseph Siegel

IPC分类号： G01K1/08

CPC分类号： G06F1/206

摘要： A system and method are provided for sensing a physical stimulus of an integrated circuit. The system and method operate with one or more active thermal sensors embedded in the die of an integrated circuit to provide highly accurate die temperature measurements. The system and method are able to monitor and control the die temperature of the integrated circuit to avoid an integrated circuit malfunction due to an undesirable temperature condition.

公开(公告)号：US5274783A

公开(公告)日：1993-12-28

申请号：US723149

申请日：1991-06-28

申请人： Kenneth A. House ,  John Kirk ,  Lawrence Narhi

发明人： Kenneth A. House ,  John Kirk ,  Lawrence Narhi

IPC分类号： G06F13/36 ,  G06F13/40 ,  G06F13/00

CPC分类号： G06F13/4045 ,  G06F13/4036

摘要： A bus interface employs a bus extender for connecting an auxiliary bus to a single port on a main bus in such a way as to interconnect one or more host computers on the main bus to one or more peripheral devices on the auxiliary bus. The bus extender employs a transceiver coupled to the main bus, another coupled to the auxiliary bus, and signal transfer and logic circuitry passing signals between and controlling the operation of the transceivers. The circuitry also performs all address translation necessary for inter-bus communication. Once communication links have been established with the designated devices on the other bus, the extender sends message data signals received over the one bus directly onto the other bus without modification. Since the interface can comply with SCSI standards, any of a variety of types of commercially available peripheral devices having controllers complying with those standards can be supported on the auxiliary bus.

公开(公告)号：US07206979B1

公开(公告)日：2007-04-17

申请号：US10878817

申请日：2004-06-28

申请人： Kamran Zarrineh ,  Kenneth A. House ,  Seokjin Kim

发明人： Kamran Zarrineh ,  Kenneth A. House ,  Seokjin Kim

IPC分类号： G11C29/00

CPC分类号： G11C29/16 ,  G11C29/40 ,  G11C29/44 ,  G11C2029/0401 ,  G11C2029/3602

摘要： A method of testing an embedded memory which includes providing a programmable memory built-in self-test module and using the programmable memory built-in self-test module to extract contents of the embedded memory upon detection of an error. The programmable memory built-in self-test module includes a pseudo binary search and stop on error function.

摘要翻译： 一种测试嵌入式存储器的方法，包括提供可编程存储器内置自检模块，并且在检测到错误时使用可编程存储器内置自检模块来提取嵌入式存储器的内容。 可编程存储器内置自检模块包括伪二进制搜索和停止误差功能。