Integrated Circuit Inductors with Reduced Magnetic Coupling
    1.
    发明申请
    Integrated Circuit Inductors with Reduced Magnetic Coupling 有权
    具有减少磁耦合的集成电路电感器

    公开(公告)号:US20100314713A1

    公开(公告)日:2010-12-16

    申请号:US12516301

    申请日:2009-03-18

    IPC分类号: H01L27/08 H01L21/02 H01L21/70

    摘要: An IC inductor structure is provided which includes a first inductor element formed on a semiconductor substrate and at least a second inductor element formed on the semiconductor substrate proximate the first inductor element. The first inductor element has a first effective magnetic field direction associated therewith, and the second inductor element has a second effective magnetic field direction associated therewith. The first and second inductor elements are oriented relative to one another so as to create a non-zero angle between the first and second effective magnetic field directions.

    摘要翻译: 提供了一种IC电感器结构,其包括形成在半导体衬底上的第一电感器元件和形成在靠近第一电感器元件的半导体衬底上的至少第二电感器元件。 第一电感器元件具有与其相关联的第一有效磁场方向,并且第二电感器元件具有与其相关联的第二有效磁场方向。 第一和第二电感器元件相对于彼此定向,以便在第一和第二有效磁场方向之间产生非零角度。

    High-speed serial data link with single precision clock source
    2.
    发明授权
    High-speed serial data link with single precision clock source 有权
    具有单精度时钟源的高速串行数据链路

    公开(公告)号:US07839965B2

    公开(公告)日:2010-11-23

    申请号:US11602275

    申请日:2006-11-21

    IPC分类号: H04L7/00

    CPC分类号: H04L7/0091 H03L7/1976

    摘要: A clock generator is provided for a transmitter in a transceiver adapted to communicate data over a serial data link. The transceiver includes a clock data recovery circuit recovers a receive clock signal and outputs a reference clock signal. The clock generator includes a local clock, a frequency difference detector, and a fractional-N frequency synthesizer. The local clock outputs a local clock signal. The frequency difference detector outputs a fractional frequency difference signal based on a frequency difference between the local clock signal and the reference clock signal. The fractional-N frequency synthesizer outputs a transmit clock signal having a same frequency as the recovered receive clock signal.

    摘要翻译: 为适用于通过串行数据链路传送数据的收发器中的发射机提供时钟发生器。 收发器包括时钟数据恢复电路恢复接收时钟信号并输出​​参考时钟信号。 时钟发生器包括本地时钟,频率差检测器和分数N频率合成器。 本地时钟输出本地时钟信号。 频差检测器基于本地时钟信号和参考时钟信号之间的频率差输出小数频差信号。 分数N频率合成器输出具有与恢复的接收时钟信号相同频率的发送时钟信号。

    Integrated circuit inductors with reduced magnetic coupling
    3.
    发明授权
    Integrated circuit inductors with reduced magnetic coupling 有权
    集成电路电感减少磁耦合

    公开(公告)号:US08143696B2

    公开(公告)日:2012-03-27

    申请号:US12516301

    申请日:2009-03-18

    IPC分类号: H01L27/08

    摘要: An IC inductor structure is provided which includes a first inductor element formed on a semiconductor substrate and at least a second inductor element formed on the semiconductor substrate proximate the first inductor element. The first inductor element has a first effective magnetic field direction associated therewith, and the second inductor element has a second effective magnetic field direction associated therewith. The first and second inductor elements are oriented relative to one another so as to create a non-zero angle between the first and second effective magnetic field directions.

    摘要翻译: 提供一种IC电感器结构,其包括形成在半导体衬底上的第一电感器元件和形成在靠近第一电感器元件的半导体衬底上的至少第二电感器元件。 第一电感器元件具有与其相关联的第一有效磁场方向,并且第二电感器元件具有与其相关联的第二有效磁场方向。 第一和第二电感器元件相对于彼此定向,以便在第一和第二有效磁场方向之间产生非零角度。

    High-speed serial data link with single precision clock source
    4.
    发明申请
    High-speed serial data link with single precision clock source 有权
    具有单精度时钟源的高速串行数据链路

    公开(公告)号:US20080118015A1

    公开(公告)日:2008-05-22

    申请号:US11602275

    申请日:2006-11-21

    IPC分类号: H04L7/00

    CPC分类号: H04L7/0091 H03L7/1976

    摘要: A clock generator is provided for a transmitter in a transceiver adapted to communicate data over a serial data link. The transceiver includes a clock data recovery circuit recovers a receive clock signal and outputs a reference clock signal. The clock generator includes a local clock, a frequency difference detector, and a fractional-N frequency synthesizer. The local clock outputs a local clock signal. The frequency difference detector outputs a fractional frequency difference signal based on a frequency difference between the local clock signal and the reference clock signal. The fractional-N frequency synthesizer outputs a transmit clock signal having a same frequency as the recovered receive clock signal.

    摘要翻译: 为适用于通过串行数据链路传送数据的收发器中的发射机提供时钟发生器。 收发器包括时钟数据恢复电路恢复接收时钟信号并输出​​参考时钟信号。 时钟发生器包括本地时钟,频率差检测器和分数N频率合成器。 本地时钟输出本地时钟信号。 频差检测器基于本地时钟信号和参考时钟信号之间的频率差输出小数频差信号。 分数N频率合成器输出具有与恢复的接收时钟信号相同频率的发送时钟信号。