公开(公告)号：US20060186546A1

公开(公告)日：2006-08-24

申请号：US11326904

申请日：2006-01-06

申请人： Kern Ang ,  Chai-Chen Liu ,  Chiang-Yung Ku ,  Jui-Feng Jao ,  Sheng-Chen Wang

发明人： Kern Ang ,  Chai-Chen Liu ,  Chiang-Yung Ku ,  Jui-Feng Jao ,  Sheng-Chen Wang

IPC分类号： H01L23/52

CPC分类号： H01L21/7684 ,  H01L21/76819 ,  H01L27/10

摘要： A new method to polish down conductive lines in the manufacture of an integrated circuit device is achieved. The method comprises providing a plurality of conductive lines overlying a substrate. A high density plasma (HDP) oxide layer is deposited overlying the substrate and the conductive lines. In the regions between the conductive lines, first planar surfaces of the HDP oxide layer are formed below the top of the conductive lines. The HDP oxide layer is sputtered down overlying the conductive lines such that second planar surfaces of the HDP oxide layer are formed above the conductive lines. A polish stopping layer is deposited overlying the HDP oxide layer. A film layer is deposited overlying the polish stopping layer. The film layer is polished down to the polish stopping layer overlying the second planar top surfaces. The film layer, the polish stopping layer, and the conductive lines are polished down to the polish stopping layer overlying the first planar top surfaces to complete the polishing down of the conductive lines.