摘要:
A semiconductor device includes an active region defined in a substrate, the active region having a trench extending below a surface of the substrate; an impurity region provided along a bottom surface and a lower sidewall of the trench, wherein an upper portion of the impurity region is spaced apart from the surface of the substrate and an upper portion of the trench; a gate insulating layer provided along an inner surface of the trench; and a gate electrode provided in the trench.
摘要:
A semiconductor device and method of forming the same are provided. The example semiconductor device may include a gate pattern including a gate electrode and a capping layer pattern on a semiconductor substrate, a spacer covering first and second sidewalls of the gate pattern, an impurity injection region formed in the semiconductor substrate adjacent to the gate pattern and an etch stopping layer covering a surface of the semiconductor substrate adjacent to the spacer, the etch stopping layer substantially not covering the first and second sidewalls of the spacer and an upper surface of the capping layer pattern. An example method of forming a semiconductor device may include selectively forming an etch stopping layer in a semiconductor substrate by injecting ions into the semiconductor substrate, the semiconductor substrate having a composition which reacts with the injected ions to form the etch stopping layer, the injected ions also injected into structural elements mounted on the semiconductor substrate, the structural elements having a composition which does not react with the injected ions to form the etch stopping layer.
摘要:
A field effect transistor includes a channel region under a gate stack formed on a semiconductor structure. The field effect transistor also includes a drain region formed with a first dopant doping a first side of the channel region, and includes a source region formed with the first dopant doping a second side of the channel region. The drain and source regions are doped asymmetrically such that a first charge carrier profile between the channel and drain regions has a steeper slope than a second charge carrier profile between the channel and source regions.
摘要:
To form a bottom electrode of a capacitor of a semiconductor device, a first insulation layer pattern having a first contact hole is formed on a substrate, and a contact plug for the bottom electrode is formed in the contact hole. A second insulation layer is formed on the first insulation layer pattern and the contact plug. The second insulation layer has a second etching rate higher than a first etching rate of the first insulation layer pattern. The second insulation layer is etched to form a second insulation layer pattern having a second a contact hole exposing the contact plug. A conductive film is formed on the sidewall and the bottom face of the second contact hole. According to the difference between the first etching rate and the second etching rate, the etching of the first insulation layer pattern near the contact plug is reduced.
摘要:
A semiconductor device and method of forming the same are provided. The example semiconductor device may include a gate pattern including a gate electrode and a capping layer pattern on a semiconductor substrate, a spacer covering first and second sidewalls of the gate pattern, an impurity injection region formed in the semiconductor substrate adjacent to the gate pattern and an etch stopping layer covering a surface of the semiconductor substrate adjacent to the spacer, the etch stopping layer substantially not covering the first and second sidewalls of the spacer and an upper surface of the capping layer pattern. An example method of forming a semiconductor device may include selectively forming an etch stopping layer in a semiconductor substrate by injecting ions into the semiconductor substrate, the semiconductor substrate having a composition which reacts with the injected ions to form the etch stopping layer, the injected ions also injected into structural elements mounted on the semiconductor substrate, the structural elements having a composition which does not react with the injected ions to form the etch stopping layer.
摘要:
To form a bottom electrode of a capacitor of a semiconductor device, a first insulation layer pattern having a first contact hole is formed on a substrate, and a contact plug for the bottom electrode is formed in the contact hole. A second insulation layer is formed on the first insulation layer pattern and the contact plug. The second insulation layer has a second etching rate higher than a first etching rate of the first insulation layer pattern. The second insulation layer is etched to form a second insulation layer pattern having a second a contact hole exposing the contact plug. A conductive film is formed on the sidewall and the bottom face of the second contact hole. According to the difference between the first etching rate and the second etching rate, the etching of the first insulation layer pattern near the contact plug is reduced.
摘要:
A field effect transistor includes a channel region under a gate stack formed on a semiconductor structure. The field effect transistor also includes a drain region formed with a first dopant doping a first side of the channel region, and includes a source region formed with the first dopant doping a second side of the channel region. The drain and source regions are doped asymmetrically such that a first charge carrier profile between the channel and drain regions has a steeper slope than a second charge carrier profile between the channel and source regions.
摘要:
A semiconductor device having a fuse and a method of fabricating the same are provided. An embodiment of he semiconductor device includes a fuse pattern having a fuse conductive pattern disposed on a semiconductor substrate and a fuse capping pattern disposed on the fuse conductive pattern. An upper insulating layer is formed to cover the semiconductor substrate having the fuse pattern. A fuse window exposing the fuse pattern through the upper insulating layer is formed. A fuse spacer and a fuse window spacer are disposed on sidewalls of the fuse pattern exposed by the fuse window and sidewalls of the fuse window, respectively.
摘要:
A field effect transistor includes a channel region under a gate stack formed on a semiconductor structure. The field effect transistor also includes a drain region formed with a first dopant doping a first side of the channel region, and includes a source region formed with the first dopant doping a second side of the channel region. The drain and source regions are doped asymmetrically such that a first charge carrier profile between the channel and drain regions has a steeper slope than a second charge carrier profile between the channel and source regions.
摘要:
A field effect transistor includes a channel region under a gate stack formed on a semiconductor structure. The field effect transistor also includes a drain region formed with a first dopant doping a first side of the channel region, and includes a source region formed with the first dopant doping a second side of the channel region. The drain and source regions are doped asymmetrically such that a first charge carrier profile between the channel and drain regions has a steeper slope than a second charge carrier profile between the channel and source regions.