公开(公告)号：US4997775A

公开(公告)日：1991-03-05

申请号：US487502

申请日：1990-02-26

申请人： Robert K. Cook ,  Chang-Ming Hsieh ,  Kiyosi Isihara ,  Mario M. Pelella

发明人： Robert K. Cook ,  Chang-Ming Hsieh ,  Kiyosi Isihara ,  Mario M. Pelella

IPC分类号： H01L21/331 ,  H01L21/8228 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732

CPC分类号： H01L21/82285 ,  H01L27/0826 ,  Y10S148/011

摘要： A method of forming a complementary bipolar transistor device includes the steps of: providing a substrate of semiconductor material including at least two electrically isolated N-type device regions having a generally planar common surface; forming a P-type buried subcollar region in a first of the device regions; forming an N-type buried subcollector region in a second of the device regions; forming an N-type base region in the common surface of the first device region; forming a layer of P-doped polysilicon over the base region in the first device region and over the second device region; patterning the layer of P-doped polysilicon to form an emitter contact generally centered on the base region of the first device region and a generally annular base contact on the second device region; forming a layer of insulating material over the patterned layer of P-doped polysilicon; forming a layer of N-doped polysilicon generally conformally over the device; patterning the layer of N-doped polysilicon to form a base contact generally surrounding the emitter contact on the first device region and an emitter contact generally surrounded by the base contact on the second device region; and heating the device at least once to drive impurities from the base and emitter contacts on the first and second device regions into the device regions whereby to form a vertical PNP transistor in the first device region and a vertical NPN transistor in the second device region.