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26 条记录 (耗时 0.011 秒)

    Method of producing Ni-Cu-Zn ferrite material
    1.
    发明授权
    Method of producing Ni-Cu-Zn ferrite material 有权
    生产Ni-Cu-Zn铁氧体材料的方法

    公开(公告)号：US06187218B1

    公开(公告)日：2001-02-13

    申请号：US09408053

    申请日：1999-09-29

    申请人： Takashi Kodama ,  Hideo Ajichi ,  Takehiro Konoike ,  Kunisaburo Tomono

    发明人： Takashi Kodama ,  Hideo Ajichi ,  Takehiro Konoike ,  Kunisaburo Tomono

    IPC分类号： C04B3526

    CPC分类号： C04B35/265 ,  C01G49/0018 ,  C01P2002/32 ,  C01P2006/10 ,  C01P2006/12 ,  C04B35/626

    摘要： A method of producing a Ni—Cu—Zn ferrite material comprises the steps of preparing a mixture of an iron compound powder having a specific surface area of about 8.5 m2/g or more, a nickel compound powder, copper compound powder and a zinc compound powder, the mixture having a specific surface area of about 8.0 m2/g or more; pre-calcining the mixture such that the pre-calcined mixture has a surface area of about 5.0 m2/g or more and a spinel crystal synthesizability within a range of about 80.5% to 98%; and milling the pre-calcined mixture to obtain a powder of a Ni—Cu—Zn ferrite material having a specific surface area of about 6.0 m2/g or more.

    摘要翻译： 制造Ni-Cu-Zn铁氧体材料的方法包括以下步骤：制备比表面积为约8.5m 2 / g以上的铁化合物粉末，镍化合物粉末，铜化合物粉末和锌化合物 所述混合物的比表面积为约8.0m 2 / g以上; 预煅烧混合物，使得预煅烧混合物的表面积为约5.0m 2 / g以上，尖晶石晶体合成性在约80.5％〜98％的范围内; 并研磨预煅烧混合物，得到比表面积为约6.0m 2 / g以上的Ni-Cu-Zn铁氧体材料粉末。

    Laminated capacitor and process for producing the same
    2.
    发明授权
    Laminated capacitor and process for producing the same 失效
    层压电容器及其制造方法

    公开(公告)号：US5933318A

    公开(公告)日：1999-08-03

    申请号：US531324

    申请日：1995-09-20

    申请人： Kunisaburo Tomono ,  Koji Kajiyoshi

    发明人： Kunisaburo Tomono ,  Koji Kajiyoshi

    IPC分类号： C08F14/24 ,  H01G4/30 ,  H01G4/08

    CPC分类号： H01G4/30 ,  Y10T29/435

    摘要： A laminated capacitor and a process for producing the same. The laminated capacitor includes a plurality of capacitor assemblies and external electrodes, the capacitor assemblies each including a thermoplastic resin film having consecutively thereon a metal film as a first internal electrode, an inorganic dielectric material film, and a metal film as a second internal electrode, the plurality of capacitor assemblies being laminated with each other to form a laminated body, the external electrodes each being provided on an end surface of the laminated body, on which the first or second internal electrode is exposed, and being electrically connected to the first and second internal electrodes, respectively.

    摘要翻译： 叠层电容器及其制造方法。 层叠电容器包括多个电容器组件和外部电极，电容器组件各自包括连续地具有作为第一内部电极的金属膜，无机介电材料膜和作为第二内部电极的金属膜的热塑性树脂膜， 所述多个电容器组件彼此层叠以形成层叠体，所述外部电极各自设置在所述层叠体的端面上，所述第一或第二内部电极暴露在所述端面上，并且电连接到所述第一和第二内部电极 第二内部电极。

    High-frequency use non-reciprocal circuit element
    4.
    发明授权
    High-frequency use non-reciprocal circuit element 失效
    高频使用不可逆电路元件

    公开(公告)号：US5498999A

    公开(公告)日：1996-03-12

    申请号：US320675

    申请日：1994-10-11

    申请人： Hiroshi Marusawa ,  Takashi Kawanami ,  Takehiro Konoike ,  Kunisaburo Tomono

    发明人： Hiroshi Marusawa ,  Takashi Kawanami ,  Takehiro Konoike ,  Kunisaburo Tomono

    IPC分类号： H01P1/383 ,  H01P1/32 ,  H01P1/36 ,  H01P1/387

    CPC分类号： H01P1/32

    摘要： A high-frequency use non-reciprocal circuit includes a sintered body which is a high-frequency use magnetic body obtained by a ceramic lamination/integral firing technique, a plurality of central electrodes which are arranged in the sintered body to be separated from each other through a magnetic layer while intersecting with each other at central portions, and electrodes for deriving impedance-matching capacitance which are formed in the vicinity of the intersecting portion to be in series with the central electrodes. The magnetic layer provided between the central electrodes serves as an insulating layer for electrically insulating the central electrodes from each other, a high-frequency use magnetic layer, and a material layer for deriving the impedance-matching capacitance.

    摘要翻译： 高频用不可逆电路包括：烧结体，其是通过陶瓷层叠/整体烧制技术获得的高频用磁体;多个中心电极，布置在烧结体中以彼此分离 通过中心部分彼此相交的磁性层，以及用于导出与交叉部分附近形成的与中心电极串联的阻抗匹配电容的电极。 设置在中心电极之间的磁性层用作将中心电极彼此电绝缘的绝缘层，高频用磁性层和用于导出阻抗匹配电容的材料层。

    Non-reducible dielectric ceramic composition
    5.
    发明授权
    Non-reducible dielectric ceramic composition 失效
    不可还原电介质陶瓷组合物

    公开(公告)号：US5264402A

    公开(公告)日：1993-11-23

    申请号：US57252

    申请日：1993-05-03

    申请人： Harunobu Sano ,  Yukio Hamaji ,  Kunisaburo Tomono

    发明人： Harunobu Sano ,  Yukio Hamaji ,  Kunisaburo Tomono

    IPC分类号： C04B35/468 ,  C04B35/49 ,  H01B3/12 ,  H01G4/12 ,  C04B35/46

    CPC分类号： C04B35/49 ,  C04B35/4682 ,  H01B3/12 ,  H01G4/1227

    摘要： The present invention is directed to non-reducible dielectric composition consisting essentially of a main composition composed of a modified barium titanate system and additives (A) and (B) incorporated therein, said main composition consisting essentially of oxides of Ba, Ca, Ti, Zr, and Nb and having a composition represented by general formula:{(Ba.sub.1-x Ca.sub.x)O}.sub.m (Ti.sub.1-o-p Zr.sub.o Nb.sub.p)O.sub.2+p/2'wherein x, o, p and m satisfy the relationships of, ##EQU1## said additive (A) being composed at least one oxides selected from the group consisting of oxides of Mn, Fe, Cr, Co, and Ni, said additive (A) being incorporated into said main composition in an amount of 0.02 to 2.0 moles per 100 moles of said main composition in terms of respective oxides, MnO.sub.2, FeO.sub.3, Cr.sub.2 O.sub.3, CoO, and NiO, said additive (B) consisting of SiO.sub.2 and/or ZnO and incorporated into said main composition in an amount of 0.1 to 2.0 moles per 100 moles of said main composition. The composition is useful as material for monolithic ceramic capacitor.

    摘要翻译： 本发明涉及不可还原的电介质组合物，其基本上由由改性钛酸钡体系组成的主要组合物和其中加入的添加剂（A）和（B）组成，所述主要组合物主要由Ba，Ca，Ti， Zr和Nb，并且具有由通式{（Ba1-xCax）O} m（Ti1-o-pZroNbp）O2 + p / 2'表示的组成，其中x，o，p和m满足关系， 所述添加剂（A）由选自氧化物中的至少一种氧化物组成，所述氧化物选自氧化物，氧化物，氧化物，氧化物，氧化物，氧化物，氧化物 的Mn，Fe，Cr，Co和Ni中的至少一种，所述添加剂（A）以相对于氧化物，MnO 2，FeO 3，Cr 2 O 3， CoO和NiO，所述添加剂（B）由SiO 2和/或ZnO组成，并且以每100摩尔所述主要com计为0.1至2.0摩尔的量加入所述主组合物中 位置。 该组合物可用作单片陶瓷电容器的材料。

    Multi-layer chip coil
    6.
    发明授权
    Multi-layer chip coil 失效
    多层芯片线圈

    公开(公告)号：US4689594A

    公开(公告)日：1987-08-25

    申请号：US906095

    申请日：1986-09-10

    申请人： Toshio Kawabata ,  Kunisaburo Tomono

    发明人： Toshio Kawabata ,  Kunisaburo Tomono

    IPC分类号： H01F17/00 ,  H01F41/02 ,  H01F5/00 ,  H01F27/28

    CPC分类号： H01F17/0013 ,  H01F41/02

    摘要： A multi-layer chip coil which comprises a stack of intermediate laminas of magnetizeable material having a through-hole defined therein so as to extend completely through the thickness thereof, first and second patterned electric conductors formed on the opposite surfaces of each of the intermediate laminas, respectively, and an electroconductive element extending through the through-hole so as to connect the first and second conductors together. The intermediate laminas are stacked one above the other with the first and second conductors in one intermediate lamina partially overlapping in contact with the second conductor in the neighboring intermediate lamina immediately thereabove and the first conductor in the neighboring intermediate lamina immediately therebelow, respectively, whereby the first and second conductors in all of the intermediate laminas, which are connected in series with each other through the respective conductive element, are connected in series with each other.

    摘要翻译： 一种多层芯片线圈，其包括可磁化材料的中间层叠层，其具有限定在其中的通孔，以便完全延伸穿过其厚度，形成在每个中间层片的相对表面上的第一和第二图案化导电体 以及延伸穿过通孔的导电元件，以将第一和第二导体连接在一起。 中间层叠体一个在另一个之上堆叠，其中一个中间层中的第一和第二导体部分重叠地与紧邻其上的相邻中间层中的第二导体和相邻中间层中的第一导体紧密接触，由此， 通过相应的导电元件彼此串联连接的所有中间薄片中的第一和第二导体彼此串联连接。