公开(公告)号：US20230076805A1

公开(公告)日：2023-03-09

申请号：US17800020

申请日：2021-03-24

申请人： KESECO CO., LTD

发明人： Dong Myung LEE

IPC分类号： H01G4/40 ,  H01G4/005 ,  H01F27/40 ,  H01G4/08

摘要： The present disclosure relates to a dielectric composite-based power reduction device. The power reduction device of the present disclosure is a dielectric composite-based power reduction device capable of high-efficiency power reduction via parallel connection to an input power supply. The power reduction is achieved by reactive power reduction based on a capacitor bank principle, a harmonic wave reduction by inductance, and an increase in active power efficiency. Disclosed are a composite electrode structure capable of achieving all of those, and an improvement in a performance based on a development of the composite.

公开(公告)号：US11450481B2

公开(公告)日：2022-09-20

申请号：US17181331

申请日：2021-02-22

申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

发明人： Kyoung Jin Cha ,  Woo Chul Shin ,  Seung Heui Lee ,  Beom Seock Oh

IPC分类号： H01G4/005 ,  H01G4/08 ,  H01G4/30

摘要： A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed in a first direction, and external electrodes disposed on the body to be connected to the internal electrodes. At least one internal electrode of the internal electrodes includes a plurality of disconnected portions penetrating through a respective internal electrode. A disconnected portion of the plurality of disconnected portions includes at least one of a pore or a dielectric substance disposed to connect adjacent dielectric layers to each other. A dielectric filling ratio, defined as a ratio of an overall length of the dielectric substance to an overall length of the disconnected portion on a cross section in the third and first directions, is more than 20% to 80% or less.

公开(公告)号：US11264167B2

公开(公告)日：2022-03-01

申请号：US16079033

申请日：2017-02-24

申请人： 3D GLASS SOLUTIONS, INC.

发明人： Jeb H. Flemming ,  Jeff A. Bullington ,  Kyle McWethy

IPC分类号： H01G4/008 ,  H01G4/38 ,  H01G4/012 ,  H05K3/00 ,  H01G4/12 ,  H01G4/08 ,  H01G4/33

摘要： The present invention provides a method of fabrication and device made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes or post to form one or more high surface area capacitive device for monolithic system level integration on a glass substrate.

公开(公告)号：US11222945B2

公开(公告)日：2022-01-11

申请号：US15857778

申请日：2017-12-29

申请人： Texas Instruments Incorporated

发明人： Thomas Dyer Bonifield ,  Kannan Soundarapandian

IPC分类号： H01L21/60 ,  H01L29/06 ,  H01L49/02 ,  H01G4/012 ,  H01G4/08 ,  H01L21/283 ,  H01L21/02 ,  H01L21/762 ,  H01L23/528 ,  H01L23/522 ,  H01L23/60 ,  H01G4/30 ,  H01L21/768 ,  H01L23/532 ,  H01L27/06 ,  H01L23/00

摘要： Described examples include a microelectronic device with a high voltage capacitor that includes a high voltage node, a low voltage node, a first dielectric disposed between the low voltage node and the high voltage node, a first conductive plate disposed between the first dielectric and the high voltage node, and a second dielectric disposed between the first conductive plate and the high voltage node.

公开(公告)号：US20210257164A1

公开(公告)日：2021-08-19

申请号：US17165498

申请日：2021-02-02

申请人： TDK CORPORATION

发明人： Masahiro HIRAOKA ,  Mitsuhiro TOMIKAWA ,  Hitoshi SAITA

IPC分类号： H01G4/33 ,  H01G4/008 ,  H01G4/08 ,  H01G4/30 ,  H05K3/38 ,  H05K1/03

摘要： Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

公开(公告)号：US11081278B2

公开(公告)日：2021-08-03

申请号：US16106497

申请日：2018-08-21

申请人： Murata Manufacturing Co., Ltd.

发明人： Hiromasa Saeki

IPC分类号： H01G4/005 ,  H01G4/008 ,  H01G4/12 ,  H01G4/33 ,  H01G4/14 ,  H01G4/08 ,  H01G9/055 ,  H01G9/032 ,  H01G9/042

摘要： A capacitor including a conductive porous base material having a plurality of pores, a dielectric layer on the conductive porous base material, an upper electrode on the dielectric layer, and an insulating material that extends into the plurality of pores.

公开(公告)号：US20210225593A1

公开(公告)日：2021-07-22

申请号：US17143581

申请日：2021-01-07

申请人： TDK CORPORATION

发明人： Kazuhiro YOSHIKAWA ,  Kenichi YOSHIDA ,  Takashi OHTSUKA ,  Yuichiro OKUYAMA ,  Takeshi OOHASHI ,  Hajime KUWAJIMA

IPC分类号： H01G4/30 ,  H01G4/08 ,  H01G4/012

摘要： Disclosed herein is an electronic component that includes a substrate; and a plurality of conductive layers and a plurality of insulating layers which are alternately laminated on the substrate. The side surface of a predetermined one of the plurality of insulating layers has a recessed part set back from a side surface of the substrate and a projecting part projecting from the recessed part. The recessed part is covered with a first dielectric film made of an inorganic insulating material.

公开(公告)号：US20210202688A1

公开(公告)日：2021-07-01

申请号：US17181485

申请日：2021-02-22

申请人： Texas Instruments Incorporated

发明人： Poornika Fernandes ,  Luigi Colombo ,  Haowen Bu

IPC分类号： H01L49/02 ,  H01L21/02 ,  H01L27/06 ,  H01G4/08 ,  H01L29/06

摘要： In a described example, an integrated circuit includes a capacitor first plate; a dielectric stack over the capacitor first plate comprising silicon nitride and silicon dioxide with a capacitance quadratic voltage coefficient less than 0.5 ppm/V2; and a capacitor second plate over the dielectric stack.

公开(公告)号：US10978553B2

公开(公告)日：2021-04-13

申请号：US16259131

申请日：2019-01-28

申请人： Micron Technology, Inc.

发明人： Diem Thy N. Tran ,  Devesh Dadhich Shreeram ,  Sanjeev Sapra

IPC分类号： H01L49/02 ,  H01L27/108 ,  H01G4/08

摘要： Methods, apparatuses, and systems related to forming a capacitor using a hard mask material are described. An example method includes patterning a surface to have a first silicate material, a first nitride material on the first silicate material, a second silicate material on the first nitride material, a second nitride material on the second silicate material, and a sacrificial material on the second nitride material. The method further includes forming a hard mask material on the sacrificial material. The method further includes forming a capacitor material in an opening through the first silicate material, the first nitride material, the second silicate material, the second nitride material, the sacrificial material, and the hard mask material. The method further includes removing the sacrificial material and the hard mask material.

公开(公告)号：US10910304B2

公开(公告)日：2021-02-02

申请号：US16256595

申请日：2019-01-24

申请人： GLOBALFOUNDRIES INC.

发明人： Anthony K. Stamper ,  Daisy A. Vaughn ,  Stephen R. Bosley ,  Zhong-Xiang He

IPC分类号： H01L23/522 ,  H01L27/08 ,  H01L49/02 ,  H01G4/33 ,  H01G4/08 ,  H01G4/232 ,  H01L23/528

摘要： The present disclosure relates to semiconductor structures and, more particularly, to tight pitch wirings and capacitors and methods of manufacture. The structure includes: a capacitor including: a bottom plate of a first conductive material; an insulator material on the bottom plate; and a top plate of a second conductive material on the insulator material; and a plurality of wirings on a same level as the bottom plate and composed of the second conductive material.