摘要:
Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance.
摘要:
A display driver and display method are provided. The display driver includes a line buffer which receives a plurality of first pixel data corresponding to a first line, and a controller which receives a plurality of second pixel data corresponding to a second line that is different from the first line. The controller also receives the first pixel data from the line buffer, classifies the second pixel data into a plurality of transition types based on the first pixel data and the second pixel data, calculates one or more characteristic values indicating characteristics of each transition type, and determines whether to perform charge sharing of channels based on the characteristic values.
摘要:
A charge sharing method, device, and system is disclosed. For example, a charge sharing method for a display driver is disclosed. The method includes: receiving a first row of data for a first row of source lines; receiving a second row of data for a second row of source lines; for each source line of at least a first group of the source lines, determining whether a change amount between data for that source line from the first row of data and data for that source line from the second row of data is above a threshold; and performing selective charge sharing based on the determinations.
摘要:
Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance.