公开(公告)号：US5117174A

公开(公告)日：1992-05-26

申请号：US416565

申请日：1989-10-03

申请人： Leland L. Kessler

发明人： Leland L. Kessler

IPC分类号： H02J3/12 ,  G05F1/10 ,  H02P9/14 ,  H02P9/30

CPC分类号： H02P9/30 ,  H02P2101/30

摘要： An electric power system having line drop compensation includes a controllable electric power source having an output for supplying voltage to a power bus, a local voltage regulator for monitoring the output voltage of the power source and for producing a control signal representative of a desired nominal output voltage of the power source, and a remote voltage regulator for sensing voltage on the power bus at a point of regulation located away from the power source. The remote voltage regulator produces a pulse width modulated signal having a duty cycle representative of the voltage at the point of regulation. A pulse width to trim bias converter receives the pulse width modulated signal and produces the trim signal having a magnitude representative of the duty cycle of the pulse width modulated signal. This trim signal is combined with the control signal of the local voltage regulator to produce a modified control signal for controlling the output voltage of the power source to produce a predetermined voltage at the point of regulation.

公开(公告)号：US4649537A

公开(公告)日：1987-03-10

申请号：US663526

申请日：1984-10-22

申请人： Mark A. Rosswurm ,  Leland L. Kessler

发明人： Mark A. Rosswurm ,  Leland L. Kessler

IPC分类号： G06F11/00 ,  G06F11/04

CPC分类号： G06F11/0763 ,  G06F11/0757 ,  G06F11/0796

摘要： A microprocessor-based electronic control unit utilizes a random pattern lock and key failure detection scheme to detect failures in the system being controlled or the control unit itself. The microprocessor system is programmed to receive a random data word, to output the same data word, and to perform a variety of tests which result in the generation of a data stream having a particular relationship to the random data word such that the data stream and the random data word bits can be combined to form a predetermined data word that is needed to maintain microprocessor control of the associated electrical system. If the microprocessor fails to generate a data stream which results in the formation of the proper predetermined data word, the control unit output will be locked into a predetermined state.

摘要翻译： 基于微处理器的电子控制单元利用随机模式锁定和密钥故障检测方案来检测被控系统中的故障或控制单元本身。 微处理器系统被编程为接收随机数据字，输出相同的数据字，并执行各种测试，这些测试导致产生与随机数据字具有特定关系的数据流，使得数据流和 可以组合随机数据字位以形成维持微处理器对相关电气系统的控制所需的预定数据字。 如果微处理器不能产生导致形成适当的预定数据字的数据流，则控制单元输出将被锁定到预定状态。

公开(公告)号：US5047890A

公开(公告)日：1991-09-10

申请号：US491764

申请日：1990-03-12

申请人： Leland L. Kessler

发明人： Leland L. Kessler

IPC分类号： H02H3/30 ,  H02H3/28

CPC分类号： H02H3/28

摘要： A differential protection circuit includes a pair of current transformers each having a secondary winding and each being inductively coupled to a power conductor at a different location. The secondary windings of these transformers are electrically connected in series with each other in a loop in a bucking arrangement. A resistor is connected in parallel with the secondary winding of each transformer. Control circuits are connected to sense a voltage signal appearing across the resistor and to take appropriate action when the sensed voltage reaches a predetermined level. An additional winding on one of the transformers provides isolation between the loop and one of the control circuits to prevent false tripping of the differential protection circuit.

公开(公告)号：US5048065A

公开(公告)日：1991-09-10

申请号：US491924

申请日：1990-03-12

申请人： Leland L. Kessler ,  David A. Fox ,  Kevin M. Jones

发明人： Leland L. Kessler ,  David A. Fox ,  Kevin M. Jones

IPC分类号： H03B23/00 ,  H03K5/156 ,  H03K23/66

CPC分类号： H03B23/00 ,  H03K23/662 ,  H03K5/156 ,  H03B2200/0092

摘要： A method for modifying the frequency of a clock signal includes the steps of producing a clock signal having voltage pulses which occur at a first frequency and producing a control signal having voltage pulses which occur at a lower frequency. The frequency of the voltage pulses in the control signal is incremented in successive time intervals and the clock signal and control signal are combined such that one voltage pulse in the clock signal is deleted for each voltage pulse in the control signal. This results in a modified clock signal having a frequency which may be ramped up or down depending upon the initial frequency of the control signal and the direction in which the frequency of the control signal is incremented.