公开(公告)号：US20080061366A1

公开(公告)日：2008-03-13

申请号：US11530480

申请日：2006-09-11

申请人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

发明人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

IPC分类号： H01L29/76

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7834

摘要： A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.

摘要翻译： 互补金属氧化物半导体（CMOS）器件包括具有第一有源区和第二有源区的衬底; 分别设置在所述第一有源区和所述第二有源区上的第一栅极结构和第二栅极结构; 分别设置在第一栅极结构和第二栅极结构的侧壁上的第一间隔结构和第二间隔结构; 在第一栅极结构和第二栅极结构的两侧分别设置在基板中的第一LDD和第二LDD; 外延材料层，设置在第一有源区并位于第一LDD的一侧; 以及钝化层，设置在所述第一栅极结构上，所述第一间隔结构和所述第一LDD并且覆盖所述第二有源区，其中所述钝化层包含含碳氮氧化物层。

公开(公告)号：US07402496B2

公开(公告)日：2008-07-22

申请号：US11530480

申请日：2006-09-11

申请人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

发明人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

IPC分类号： H01L21/336

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7834

摘要： A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.

摘要翻译： 互补金属氧化物半导体（CMOS）器件包括具有第一有源区和第二有源区的衬底; 分别设置在所述第一有源区和所述第二有源区上的第一栅极结构和第二栅极结构; 分别设置在第一栅极结构和第二栅极结构的侧壁上的第一间隔结构和第二间隔结构; 在第一栅极结构和第二栅极结构的两侧分别设置在基板中的第一LDD和第二LDD; 外延材料层，设置在第一有源区并位于第一LDD的一侧; 以及钝化层，设置在所述第一栅极结构上，所述第一间隔结构和所述第一LDD并且覆盖所述第二有源区，其中所述钝化层包含含碳氮氧化物层。

公开(公告)号：US20080116525A1

公开(公告)日：2008-05-22

申请号：US12024069

申请日：2008-01-31

申请人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

发明人： Che-Hung Liu ,  Po-Lun Cheng ,  Chun-An Lin ,  Li-Yuen Tang ,  Hung-Lin Shih ,  Ming-Chi Fan ,  Hsien-Liang Meng ,  Jih-Shun Chiang

IPC分类号： H01L27/088

CPC分类号： H01L21/823814 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

摘要： A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.

摘要翻译： 互补金属氧化物半导体（CMOS）器件包括具有第一有源区和第二有源区的衬底; 分别设置在所述第一有源区和所述第二有源区上的第一栅极结构和第二栅极结构; 分别设置在第一栅极结构和第二栅极结构的侧壁上的第一间隔结构和第二间隔结构; 在第一栅极结构和第二栅极结构的两侧分别设置在基板中的第一LDD和第二LDD; 外延材料层，设置在第一有源区并位于第一LDD的一侧; 以及钝化层，设置在所述第一栅极结构上，所述第一间隔结构和所述第一LDD并且覆盖所述第二有源区，其中所述钝化层包含含碳氮氧化物层。

公开(公告)号：US20080293222A1

公开(公告)日：2008-11-27

申请号：US12179576

申请日：2008-07-24

申请人： Jih-Shun Chiang ,  Hung-Lin Shih ,  Li-Yuen Tang ,  Tian-Fu Chiang ,  Ming-Chi Fan ,  Chin-I Liao ,  Chin-Cheng Chien

发明人： Jih-Shun Chiang ,  Hung-Lin Shih ,  Li-Yuen Tang ,  Tian-Fu Chiang ,  Ming-Chi Fan ,  Chin-I Liao ,  Chin-Cheng Chien

IPC分类号： H01L21/205

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/6656 ,  H01L29/66628

摘要： A method for forming a SiGe epitaxial layer is described. A first SEG process is performed under a first condition, consuming about 1% to 20% of the total process time for forming the SiGe epitaxial layer. Then, a second SEG process is performed under a second condition, consuming about 99% to 80% of the total process time. The first condition and the second condition include different temperatures or pressures. The first and the second SEG processes each uses a reactant gas that includes at least a Si-containing gas and a Ge-containing gas.

摘要翻译： 描述了形成SiGe外延层的方法。 在第一条件下执行第一SEG工艺，消耗用于形成SiGe外延层的总工艺时间的约1％至20％。 然后，在第二条件下执行第二SEG处理，消耗总处理时间的约99％至80％。 第一个条件和第二个条件包括不同的温度或压力。 第一和第二SEG方法各自使用至少包含含Si气体和含Ge气体的反应气体。

公开(公告)号：US20080076236A1

公开(公告)日：2008-03-27

申请号：US11309739

申请日：2006-09-21

申请人： Jih-Shun Chiang ,  Hung-Lin Shih ,  Li-Yuen Tang ,  Tian-Fu Chiang ,  Ming-Chi Fan ,  Chin-I Liao ,  Chin-Cheng Chien

发明人： Jih-Shun Chiang ,  Hung-Lin Shih ,  Li-Yuen Tang ,  Tian-Fu Chiang ,  Ming-Chi Fan ,  Chin-I Liao ,  Chin-Cheng Chien

IPC分类号： H01L21/20 ,  H01L33/00 ,  H01L21/36

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/6656 ,  H01L29/66628

摘要： A method for forming a SiGe epitaxial layer is described. A first SEG process is performed under a first condition, consuming about 1% to 20% of the total process time for forming the SiGe epitaxial layer. Then, a second SEG process is performed under a second condition, consuming about 99% to 80% of the total process time. The first condition and the second condition include different temperatures or pressures. The first and the second SEG processes each uses a reactant gas that includes at least a Si-containing gas and a Ge-containing gas.