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公开(公告)号：US08805274B2
公开(公告)日：2014-08-12
申请号：US12449083
申请日：2007-01-25
CPC分类号： H04H40/90
摘要： An architecture and protocol enables signal communications between either a frequency translation module and a decoder within a dwelling, or between an antenna and a decoder within a dwelling. According to an exemplary embodiment, the decoder comprises a switch 33 between the low noise block converter power supply, and a transceiver and output coupling. The switch 33 generates a high impedance during operation of the frequency translation module and the LNB power supply 38, thereby isolating the transceiver and the output coupling from the LNB power supply. The switch generates a low impedance between the LNB power supply and the transceiver and output coupling during operation of the LNB power supply.
摘要翻译： 架构和协议使得在住宅内的频率转换模块和解码器之间或在住宅内的天线和解码器之间的信号通信。 根据示例性实施例，解码器包括在低噪声块转换器电源与收发器和输出耦合之间的开关33。 开关33在频率转换模块和LNB电源38的操作期间产生高阻抗，从而将收发器和输出耦合与LNB电源隔离。 该开关在LNB电源和收发器之间产生低阻抗，并在LNB电源运行期间输出耦合。
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公开(公告)号：US20100105318A1
公开(公告)日：2010-04-29
申请号：US12449083
申请日：2007-01-25
CPC分类号： H04H40/90
摘要： An architecture and protocol enables signal communications between either a frequency translation module and a decoder within a dwelling, or between an antenna and a decoder within a dwelling. According to an exemplary embodiment, the decoder comprises a switch 33 between the low noise block converter power supply, and a transceiver and output coupling. The switch 33 generates a high impedance during operation of the frequency translation module and the LNB power supply 38, thereby isolating the transceiver and the output coupling from the LNB power supply. The switch generates a low impedance between the LNB power supply and the transceiver and output coupling during operation of the LNB power supply.
摘要翻译： 架构和协议使得在住宅内的频率转换模块和解码器之间或在住宅内的天线和解码器之间的信号通信。 根据示例性实施例，解码器包括在低噪声块转换器电源与收发器和输出耦合之间的开关33。 开关33在频率转换模块和LNB电源38的操作期间产生高阻抗，从而将收发器和输出耦合与LNB电源隔离。 该开关在LNB电源和收发器之间产生低阻抗，并在LNB电源运行期间输出耦合。
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公开(公告)号：US20100103580A1
公开(公告)日：2010-04-29
申请号：US12449077
申请日：2007-01-25
IPC分类号： H02H3/20
摘要： An architecture for protecting circuitry used for signal communications between a frequency translation module and a decoder from transient voltage surges. According to an exemplary embodiment, the apparatus comprises a first signal path between a transmission line and a first reference potential for conducting negative voltage surges between said transmission line and said first reference potential, comprising a first diode and a first clamping diode, wherein a second reference potential is coupled to a junction of the first diode and the first clamping diode, and a second signal path between the transmission line and the first reference potential, comprising a second diode and a second clamping diode for conducting positive voltage surges between said transmission line and said first reference potential, wherein a second reference potential is coupled to a junction of the second diode and the second clamping diode.
摘要翻译： 一种用于保护用于频率转换模块和解码器之间的信号通信的电路从瞬态电压浪涌的架构。 根据示例性实施例，该装置包括在传输线和第一参考电位之间的第一信号路径，用于在所述传输线和所述第一参考电位之间传导负电压浪涌，包括第一二极管和第一钳位二极管，其中第二 参考电位耦合到第一二极管和第一钳位二极管的结，以及传输线和第一参考电位之间的第二信号路径，包括第二二极管和第二钳位二极管，用于在所述传输线 和所述第一参考电位，其中第二参考电位耦合到所述第二二极管和所述第二钳位二极管的结。
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4.发明授权Method and apparatus for determining high order polynomials for linearization of position signals 有权用于确定位置信号线性化的高阶多项式的方法和装置公开(公告)号：US06674607B2
公开(公告)日：2004-01-06
申请号：US09873752
申请日：2001-06-04
申请人： KianKeong Ooi , WingKong Chiang , Lincheng Xiu , SiokYin Tan , YangQuan Chen
发明人： KianKeong Ooi , WingKong Chiang , Lincheng Xiu , SiokYin Tan , YangQuan Chen
IPC分类号： G11B5596
CPC分类号： G11B5/59622 , G11B5/59627
摘要： A method and storage device are provided for initializing a polynomial linearizer in the storage device. The linearizer is initialized by identifying the coefficients of the linearizer polynomial. To reduce the computational intensity of this process, orthogonal-type coefficients for at least two orthogonal polynomials are identified, where the linearizer polynomial is formed as the sum of the orthogonal polynomials. The orthogonal-type coefficients are then combined to identify linearizer coefficients for the linearizer polynomial.
摘要翻译： 提供一种用于在存储装置中初始化多项式线性化装置的方法和存储装置。 通过识别线性化多项式的系数来初始化线性化器。 为了减少该过程的计算强度，识别用于至少两个正交多项式的正交类型系数，其中线性化多项式形成为正交多项式的和。 然后将正交型系数组合以识别线性化多项式的线性化系数。
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公开(公告)号：US20100071009A1
公开(公告)日：2010-03-18
申请号：US12450418
申请日：2008-03-26
IPC分类号： H04N7/20
CPC分类号： H03H2/008 , H01Q1/247 , H01Q1/50 , H03F1/52 , H03F3/189 , H03H3/06 , H03H7/0138 , H03J3/06 , H03J3/24 , H04H40/90 , H04N7/20
摘要： A fluid sensor comprises a sensor housing (12), a sensor package (14), an actuator (16) and a switch (18). The sensor package (14) is disposed within the sensor housing (12) and includes first and second screens and at least one sensing membrane. The sensing membrane is disposed between the first and second screens (36) and is adapted to expand when exposed to a predetermined quantity of a first predetermined fluid. The actuator (16) is disposed proximate the sensor package (14) within the sensor housing (12) and moveable between a first position and a second position through an intermediate position. The switch (18) is disposed proximate the actuator (16) and is operable between closed and open positions. When the actuator (16) is in the second position at least a portion of the actuator (16) depresses the switch (18) to control an-electrical, circuit connected therewith.
摘要翻译： 流体传感器包括传感器壳体（12），传感器封装（14），致动器（16）和开关（18）。 传感器封装（14）设置在传感器外壳（12）内并且包括第一和第二屏幕以及至少一个传感膜。 感测膜设置在第一和第二筛网（36）之间，并且适于当暴露于预定量的第一预定流体时膨胀。 致动器（16）设置在传感器外壳（12）内靠近传感器封装（14）处，并通过中间位置在第一位置和第二位置之间移动。 开关（18）设置在致动器（16）附近并且可在闭合位置和打开位置之间操作。 当致动器（16）处于第二位置时，致动器（16）的至少一部分按压开关（18）以控制与其连接的电气电路。
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公开(公告)号：US08081412B2
公开(公告)日：2011-12-20
申请号：US12449077
申请日：2007-01-25
IPC分类号： H02H9/00
摘要： An architecture for protecting circuitry used for signal communications between a frequency translation module and a decoder from transient voltage surges. According to an exemplary embodiment, the apparatus comprises a first signal path between a transmission line and a first reference potential for conducting negative voltage surges between said transmission line and said first reference potential, comprising a first diode and a first clamping diode, wherein a second reference potential is coupled to a junction of the first diode and the first clamping diode, and a second signal path between the transmission line and the first reference potential, comprising a second diode and a second clamping diode for conducting positive voltage surges between said transmission line and said first reference potential, wherein a second reference potential is coupled to a junction of the second diode and the second clamping diode.
摘要翻译： 一种用于保护用于频率转换模块和解码器之间的信号通信的电路从瞬态电压浪涌的架构。 根据示例性实施例，该装置包括在传输线和第一参考电位之间的第一信号路径，用于在所述传输线和所述第一参考电位之间传导负电压浪涌，包括第一二极管和第一钳位二极管，其中第二 参考电位耦合到第一二极管和第一钳位二极管的结，以及传输线和第一参考电位之间的第二信号路径，包括第二二极管和第二钳位二极管，用于在所述传输线 和所述第一参考电位，其中第二参考电位耦合到所述第二二极管和所述第二钳位二极管的结。
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公开(公告)号：US20100053836A1
公开(公告)日：2010-03-04
申请号：US12450415
申请日：2008-03-26
IPC分类号： H02H9/04
CPC分类号： H03H2/008 , H01Q1/247 , H01Q1/50 , H03F1/52 , H03F3/189 , H03H3/06 , H03H7/0138 , H03J3/06 , H03J3/24 , H04H40/90 , H04N7/20
摘要： An architecture for protecting circuitry used for signal communications between a frequency translation module (20) and a decoder (60) from transient voltage surges. According to an exemplary embodiment, the apparatus comprises a first signal path between a transmission line and a first reference potential, comprising a high impedance negative surge path; and a second signal path between the transmission line and the first reference potential, comprising a high impedance positive surge path, a low inductance surge path and a DC blocker circuit, wherein said high impedance positive surge path is configured in series with said low inductance surge path and said DC blocker circuit, wherein each of said low inductance surge path and said DC blocker circuit are coupled between said high impedance positive surge path and said source of reference potential.
摘要翻译： 一种用于保护用于频率转换模块（20）和解码器（60）之间的信号通信的电路与瞬态电压浪涌的架构。 根据示例性实施例，该装置包括传输线和第一参考电位之间的第一信号路径，包括高阻抗负浪涌路径; 以及传输线和第一参考电位之间的第二信号路径，包括高阻抗正浪涌路径，低电感浪涌路径和DC阻断电路，其中所述高阻抗正浪涌路径被配置为与所述低电感浪涌串联 路径和所述DC阻断电路，其中所述低电感浪涌路径和所述DC阻断电路中的每一个耦合在所述高阻抗正浪涌路径和所述参考电位源之间。
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公开(公告)号：US08699983B2
公开(公告)日：2014-04-15
申请号：US12450418
申请日：2008-03-26
CPC分类号： H03H2/008 , H01Q1/247 , H01Q1/50 , H03F1/52 , H03F3/189 , H03H3/06 , H03H7/0138 , H03J3/06 , H03J3/24 , H04H40/90 , H04N7/20
摘要： A fluid sensor comprises a sensor housing (12), a sensor package (14), an actuator (16) and a switch (18). The sensor package (14) is disposed within the sensor housing (12) and includes first and second screens and at least one sensing membrane. The sensing membrane is disposed between the first and second screens (36) and is adapted to expand when exposed to a predetermined quantity of a first predetermined fluid. The actuator (16) is disposed proximate the sensor package (14) within the sensor housing (12) and moveable between a first position and a second position through an intermediate position. The switch (18) is disposed proximate the actuator (16) and is operable between closed and open positions. When the actuator (16) is in the second position at least a portion of the actuator (16) depresses the switch (18) to control an-electrical, circuit connected therewith.
摘要翻译： 流体传感器包括传感器壳体（12），传感器封装（14），致动器（16）和开关（18）。 传感器封装（14）设置在传感器外壳（12）内并且包括第一和第二屏幕以及至少一个传感膜。 感测膜设置在第一和第二筛网（36）之间，并且适于当暴露于预定量的第一预定流体时膨胀。 致动器（16）设置在传感器外壳（12）内靠近传感器封装（14）处，并通过中间位置在第一位置和第二位置之间移动。 开关（18）设置在致动器（16）附近并且可在闭合位置和打开位置之间操作。 当致动器（16）处于第二位置时，致动器（16）的至少一部分按压开关（18）以控制与其连接的电气电路。
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9.发明授权Optimally designed parsimonious repetitive learning compensator for hard disc drives having high track density 失效具有高轨道密度的硬盘驱动器的优化设计的简约重复学习补偿器公开(公告)号：US06574067B2
公开(公告)日：2003-06-03
申请号：US09759754
申请日：2001-01-12
申请人： YangQuan Chen , MingZhong Ding , LinCheng Xiu , KianKeong Ooi , LeeLing Tan
发明人： YangQuan Chen , MingZhong Ding , LinCheng Xiu , KianKeong Ooi , LeeLing Tan
IPC分类号： G11B5596
CPC分类号： G11B5/59605 , G11B5/5521
摘要： A repetitive learning compensator for a servo system of a disc drive includes a memory buffer having a length N/m where N is the number of servo sectors in a track, m is a parsing factor greater than 1 and N/m is an integer. A down sampler supplies servo signals containing error signals to the repetitive learning compensator at a frequency of fs/m, where fs is a sampling frequency based on N and a fundamental frequency f0 of the spindle motor. An up sampler supplies filtered signals from the repetitive learning compensator to the actuator assembly at the sampling frequency fs. One aspect of the disclosure includes tuning the repetitive learning compensator with a phase advance represented by NPA and a cutoff frequency fc, where NPA and fc are selected as a pair to provide the greatest transfer function amplitude at the harmonic frequencies for the repetitive learning compensator.
摘要翻译： 用于盘驱动器的伺服系统的重复学习补偿器包括具有长度N / m的存储器缓冲器，其中N是轨道中的伺服扇区的数量，m是大于1的解析因子，N / m是整数。 下采样器以fs / m的频率向重复学习补偿器提供含有误差信号的伺服信号，其中fs是基于N的采样频率和主轴电机的基频f0。 上采样器以重复学习补偿器将滤波信号以采样频率fs提供给执行器组件。 本公开的一个方面包括用由NPA表示的相位提前和截止频率fc来调整重复学习补偿器，其中NPA和fc被选择为一对以在重复学习补偿器的谐波频率处提供最大的传递函数幅度。
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