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公开(公告)号:US08551880B2
公开(公告)日:2013-10-08
申请号:US12262964
申请日:2008-10-31
IPC分类号: H01L21/44
CPC分类号: H01L21/76814 , H01L21/02063 , H01L21/76826 , H01L21/76828
摘要: A method for fabricating a semiconductor device is described. A substrate is provided having a patterned dielectric layer disposed thereon. A trench is formed in the dielectric layer. The surfaces of the trench are treated with an ammonia-based plasma process. A metal layer is then formed in the trench.
摘要翻译: 对半导体装置的制造方法进行说明。 提供了具有设置在其上的图案化电介质层的衬底。 在电介质层中形成沟槽。 用氨基等离子体处理处理沟槽的表面。 然后在沟槽中形成金属层。
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2.
公开(公告)号:US20090117736A1
公开(公告)日:2009-05-07
申请号:US12262964
申请日:2008-10-31
申请人: Bencherki Mebarki , Amit Khandewal , Linh H. Thanh
发明人: Bencherki Mebarki , Amit Khandewal , Linh H. Thanh
IPC分类号: H01L21/44
CPC分类号: H01L21/76814 , H01L21/02063 , H01L21/76826 , H01L21/76828
摘要: A method for fabricating a semiconductor device is described. A substrate is provided having a patterned dielectric layer disposed thereon. A trench is formed in the dielectric layer. The surfaces of the trench are treated with an ammonia-based plasma process. A metal layer is then formed in the trench.
摘要翻译: 对半导体装置的制造方法进行说明。 提供了具有设置在其上的图案化电介质层的衬底。 在电介质层中形成沟槽。 用氨基等离子体处理处理沟槽的表面。 然后在沟槽中形成金属层。
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公开(公告)号:US06656840B2
公开(公告)日:2003-12-02
申请号:US10136455
申请日:2002-04-29
申请人: Nagarajan Rajagopalan , Joe Feng , Christopher S Ngai , Meiyee (Maggie Le) Shek , Suketu A Parikh , Linh H Thanh
发明人: Nagarajan Rajagopalan , Joe Feng , Christopher S Ngai , Meiyee (Maggie Le) Shek , Suketu A Parikh , Linh H Thanh
IPC分类号: H01L2144
CPC分类号: H01L21/76834 , C23C18/1245 , C23C18/1254 , H01L21/31122 , H01L21/3185 , H01L21/76801 , H01L21/76807 , H01L21/76832 , H01L21/76838
摘要: A method for forming a microelectronics device is disclosed. In one embodiment, the method includes depositing a conductive structure on a substrate. A first layer comprising silicon and nitrogen is formed on the substrate. A second layer comprising silicon and nitrogen is then formed on the first layer. The nitrogen to silicon ratio in the first layer is greater than the nitrogen to silicon ratio in the second layer.
摘要翻译: 公开了一种用于形成微电子器件的方法。 在一个实施例中,该方法包括在衬底上沉积导电结构。 在衬底上形成包含硅和氮的第一层。 然后在第一层上形成包含硅和氮的第二层。 第一层中的氮与硅之比大于第二层中的氮与硅之比。
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