公开(公告)号：US5371517A

公开(公告)日：1994-12-06

申请号：US791757

申请日：1991-11-08

申请人： Louis Izzi ,  William R. Krenik ,  Henry T. Yung ,  Chenwei J. Yin ,  Carrell R. Killebrew, Jr. ,  Karl Guttag ,  Jerry R. Van Aken ,  Jeffrey Nye ,  Richard Simpson ,  Mike Asal

发明人： Louis Izzi ,  William R. Krenik ,  Henry T. Yung ,  Chenwei J. Yin ,  Carrell R. Killebrew, Jr. ,  Karl Guttag ,  Jerry R. Van Aken ,  Jeffrey Nye ,  Richard Simpson ,  Mike Asal

IPC分类号： G06F11/00 ,  G09G5/06 ,  G09G5/18 ,  G09G1/28

CPC分类号： G06F11/006 ,  G09G5/06 ,  G09G5/18

摘要： A color palette selects a master clock from plural clock signals received at clock input terminals in response to a master clock selection control word received at control data terminals. A circuit forms a plurality of divided down clock signals from selected divide ratios of the master clock. A circuit selects a shift clock from among the divided down clock signals in response to at least some bits of an output clock selection control word received at the control data terminals. A circuit selectively enables and disables the shift clock in response to blanking data. A circuit selects a video clock from among the divided down clock signals in response to at least some bits of the output clock selection control word. A circuit synchronizes multiple bit words of color code received at color code input terminals with the master clock. A circuit outputs at least one memory recall address in response to receiving each multiple bit word of color code. A circuit stores color data words in a plurality of data storage locations, having associated memory recall addresses, and outputs a color data word upon receipt of an associated memory recall address. A circuit selectively writes color data words into these plural locations. A circuit synchronizes video control signals received at video control terminals with the master clock and provides the blanking data. A circuit selects for output between said color data words and true color data words received at said color code input terminals.

摘要翻译： 响应于在控制数据终端接收的主时钟选择控制字，调色板从在时钟输入端接收的多个时钟信号中选择主时钟。 A电路根据主时钟的选择的分频比形成多个分频的下降时钟信号。 电路响应于在控制数据端子处接收的输出时钟选择控制字的至少一些位，从分频的下降时钟信号中选择移位时钟。 电路响应于消隐数据选择性地启用和禁用移位时钟。 响应于输出时钟选择控制字的至少一些位，电路从分频的下降时钟信号中选择视频时钟。 电路将彩色码输入端子接收的彩色码的多位字与主时钟同步。 响应于接收到颜色代码的每个多个位字，A电路输出至少一个存储器调用地址。 电路将颜色数据字存储在具有相关联的存储器调用地址的多个数据存储位置中，并且在接收到相关联的存储器调用地址时输出彩色数据字。 电路将彩色数据字选择性地写入这些多个位置。 电路将视频控制终端接收的视频控制信号与主时钟同步，并提供消隐数据。 电路选择所述颜色数据字和在所述颜色代码输入端接收的真彩色数据字之间的输出。