-
公开(公告)号：US08638535B2
公开(公告)日：2014-01-28
申请号：US12987219
申请日：2011-01-10
申请人： Kevin P. Roy , Richard A. Poisson , Jay W. Kokas , Edward John Marotta , Robert C. Hoeckele , Luke T. Orsini , Marc S. McCloud , Matthew S. Fitzpatrick
发明人： Kevin P. Roy , Richard A. Poisson , Jay W. Kokas , Edward John Marotta , Robert C. Hoeckele , Luke T. Orsini , Marc S. McCloud , Matthew S. Fitzpatrick
IPC分类号： H02H3/22
CPC分类号： H01L23/49562 , H01L21/561 , H01L23/16 , H01L23/3107 , H01L23/49575 , H01L23/62 , H01L24/48 , H01L2224/48247 , H01L2924/00014 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.
摘要翻译： 系统包括具有顶表面和底表面的封装，布置在封装内的多个高功率瞬态电压抑制器，以及稳健的引线框架。 每个瞬态电压抑制器具有大致垂直于封装的顶表面和底表面的第一和第二主表面。 引线框架包括连接到瞬态电压抑制器的主表面的引线。 每个引线在安装部分中具有大于约0.015英寸（或0.381mm）的厚度，以便从瞬态电压抑制器散发热量并抵抗封装上的振动引起的应力。
-
公开(公告)号：US20100263900A1
公开(公告)日：2010-10-21
申请号：US12631358
申请日：2009-12-04
CPC分类号： H05K5/0247 , Y10T29/49002
摘要： A Full Authority Digital Controller (FADEC) has a stamped housing body, a FADEC circuit assembly within the housing body, and a cover. An electrical connector is mounted to the housing body.
摘要翻译： 全权限数字控制器（FADEC）具有冲压的壳体，壳体内的FADEC电路组件和盖。 电连接器安装到壳体上。
-
公开(公告)号：US08340793B2
公开(公告)日：2012-12-25
申请号：US12791163
申请日：2010-06-01
申请人： Jeffry K. Kamenetz , Gregory DiVincenzo , Mark A. Johnston , Jay W. Kokas , Luke T. Orsini , Steven R. Fischer , Jay H. Hartman , Kevin P. Roy , William Betterini
发明人： Jeffry K. Kamenetz , Gregory DiVincenzo , Mark A. Johnston , Jay W. Kokas , Luke T. Orsini , Steven R. Fischer , Jay H. Hartman , Kevin P. Roy , William Betterini
CPC分类号： G06F11/0796 , G05B19/0428 , G05B2219/25471 , G06F11/2028
摘要： An electronic control configuration includes at least one secondary microprocessor operable to control a device. The at least one secondary microprocessor assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector. The at least one secondary microprocessor assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector. The backup control functionality of the at least one secondary microprocessor can be selectively disabled.
摘要翻译： 电子控制配置包括可操作以控制设备的至少一个二次微处理器。 所述至少一个次要微处理器通过将保护控制信号发送到第一执行器来假定对所述设备的保护控制，所述设备响应于第一类型的故障。 所述至少一个次级微处理器通过将备用控制信号发送到第二执行器来假定设备对第二类型故障的备份控制。 可以选择性地禁用至少一个次要微处理器的备用控制功能。
-
公开(公告)号：US20120176716A1
公开(公告)日：2012-07-12
申请号：US12987219
申请日：2011-01-10
申请人： Kevin P. Roy , Richard A. Poisson , Jay W. Kokas , Edward John Marotta , Robert C. Hoeckele , Luke T. Orsini , Marc S. McCloud , Matthew S. Fitzpatrick
发明人： Kevin P. Roy , Richard A. Poisson , Jay W. Kokas , Edward John Marotta , Robert C. Hoeckele , Luke T. Orsini , Marc S. McCloud , Matthew S. Fitzpatrick
IPC分类号： H02H3/22
CPC分类号： H01L23/49562 , H01L21/561 , H01L23/16 , H01L23/3107 , H01L23/49575 , H01L23/62 , H01L24/48 , H01L2224/48247 , H01L2924/00014 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.
摘要翻译： 系统包括具有顶表面和底表面的封装，布置在封装内的多个高功率瞬态电压抑制器，以及稳健的引线框架。 每个瞬态电压抑制器具有大致垂直于封装的顶表面和底表面的第一和第二主表面。 引线框架包括连接到瞬态电压抑制器的主表面的引线。 每个引线在安装部分中具有大于约0.015英寸（或0.381mm）的厚度，以便从瞬态电压抑制器散发热量并抵抗封装上的振动引起的应力。
-
公开(公告)号：US20110087343A1
公开(公告)日：2011-04-14
申请号：US12791163
申请日：2010-06-01
申请人： Jeffry K. Kamenetz , Gregory DiVincenzo , Mark A. Johnston , Jay W. Kokas , Luke T. Orsini , Steven R. Fischer , Jay H. Hartman , Kevin P. Roy , William Betterini
发明人： Jeffry K. Kamenetz , Gregory DiVincenzo , Mark A. Johnston , Jay W. Kokas , Luke T. Orsini , Steven R. Fischer , Jay H. Hartman , Kevin P. Roy , William Betterini
IPC分类号： G05B9/03
CPC分类号： G06F11/0796 , G05B19/0428 , G05B2219/25471 , G06F11/2028
摘要： An electronic control configuration includes at least one secondary microprocessor operable to control a device. The at least one secondary microprocessor assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector. The at least one secondary microprocessor assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector. The backup control functionality of the at least one secondary microprocessor can be selectively disabled.
摘要翻译： 电子控制配置包括可操作以控制设备的至少一个二次微处理器。 所述至少一个次要微处理器通过将保护控制信号发送到第一执行器来假定对所述设备的保护控制，所述设备响应于第一类型的故障。 所述至少一个次级微处理器通过将备用控制信号发送到第二执行器来假定设备对第二类型故障的备份控制。 可以选择性地禁用至少一个次要微处理器的备用控制功能。
-
-
-
-
搜索结果
5 条记录 (耗时 0.013 秒)
