Step-up converter
    1.
    发明授权
    Step-up converter 有权
    升压转换器

    公开(公告)号:US07482789B2

    公开(公告)日:2009-01-27

    申请号:US11414373

    申请日:2006-05-01

    IPC分类号: G05F1/62

    CPC分类号: H02M3/1588 Y02B70/1466

    摘要: A step-up converter includes an inductor which receives input voltage Vi at one end, a first FET of the first conduction type which functions as a switch for determining whether or not energy is accumulated in the inductor, a second FET of the second conduction type which rectifies a current output from the other end of the inductor, an output capacitor having an end connected to the source of the second FET, a current detection circuit, and a feedback control circuit. The current detection circuit detects a current flowing through the first N-channel FET to output current detection signal Vc. The feedback control circuit controls the operations of the first N-channel FET and a P-channel FET based on current detection signal Vc.

    摘要翻译: 升压转换器包括在一端接收输入电压Vi的电感器,第一导电类型的第一FET,其用作用于确定能量是否积聚在电感器中的开关,第二导电类型的第二FET 其对来自电感器另一端的电流输出进行整流;输出电容器,其端部连接到第二FET的源极,电流检测电路和反馈控制电路。 电流检测电路检测流过第一N沟道FET的电流以输出电流检测信号Vc。 反馈控制电路基于电流检测信号Vc来控制第一N沟道FET和P沟道FET的操作。

    Step-up converter
    2.
    发明申请
    Step-up converter 有权
    升压转换器

    公开(公告)号:US20080211475A1

    公开(公告)日:2008-09-04

    申请号:US11905399

    申请日:2007-09-28

    IPC分类号: G05F1/565

    CPC分类号: H02M3/156

    摘要: The present invention provides a current-mode control step-up converter capable of reducing the minimum duty ratio to a sufficiently small value and facilitating the setting of the maximum duty ratio. The step-up converter comprises a current detector 9 for generating a current detection signal Vc corresponding to the current of a rectifier 4; an error amplifier 8 for generating an error signal Ve corresponding to an output DC voltage Vo; and a control circuit 10 for turning ON/OFF the main switch 3 on the basis of the current detection signal Vc and the error signal Ve. The control circuit 10 comprises a comparator 11 and a timer circuit 12. With this configuration, the ON time of the main switch 3 is set at a predetermined value, and the valley value of an inductor current changing in a triangular waveform is controlled. Hence, the OFF time of the main switch is adjusted to stabilize the output. Since the ON time of the main switch 3 can be set as desired, the minimum duty ratio can be reduced to zero or a sufficiently small value.

    摘要翻译: 本发明提供了一种电流模式控制升压转换器,其能够将最小占空比降低到足够小的值,并且有助于设定最大占空比。 升压转换器包括用于产生与整流器4的电流相对应的电流检测信号Vc的电流检测器9; 用于产生对应于输出DC电压Vo的误差信号Ve的误差放大器8; 以及用于根据电流检测信号Vc和误差信号Ve导通/断开主开关3的控制电路10。 控制电路10包括比较器11和定时器电路12。 利用这种配置,主开关3的接通时间被设定为预定值,并且控制以三角波形变化的电感器电流的谷值。 因此,主开关的断开时间被调节以稳定输出。 由于可以根据需要设定主开关3的导通时间,所以可以将最小占空比降低到零或足够小的值。

    DC-DC converter
    3.
    发明授权
    DC-DC converter 有权
    DC-DC转换器

    公开(公告)号:US07391199B2

    公开(公告)日:2008-06-24

    申请号:US11489184

    申请日:2006-07-19

    IPC分类号: G05F1/575 G05F1/618

    摘要: In a DC-DC converter conforming to the current mode control system, in which the valley value of an inductor current is controlled for output control, a current detection circuit 6 is configured to detect the current flowing from a low-side FET 2 to an inductor 3 using an FET 60, an NPN transistor 61, an NPN transistor 62, a PNP transistor 64, a PNP transistor 65 and a resistor 66, to detect the current flowing from the inductor 3 to the low-side FET 2 using an FET 67, a differential amplifier 68, an FET 69 and the resistor 66, and to output a current detection signal Vc.

    摘要翻译: 在符合电流模式控制系统的DC-DC转换器中,其中电感电流的谷值被控制用于输出控制,电流检测电路6被配置为检测从低侧FET 2流向 使用FET60,NPN晶体管61,NPN晶体管62,PNP晶体管64,PNP晶体管65和电阻器66的电感器3,以使用FET检测从电感器3流向低侧FET2的电流 67,差分放大器68,FET69和电阻66,并输出电流检测信号Vc。

    DC-DC converter and control circuit thereof
    4.
    发明申请
    DC-DC converter and control circuit thereof 失效
    DC-DC转换器及其控制电路

    公开(公告)号:US20070096711A1

    公开(公告)日:2007-05-03

    申请号:US11545050

    申请日:2006-10-06

    IPC分类号: G05F1/00

    CPC分类号: H02M3/1563

    摘要: The present invention is intended to provide a DC-DC converter, in which the relationship between the duty ratio of a drive signal and the output DC voltage is nonlinear, being characterized in that the relationship between an error signal and the output DC voltage is linear, and that the design of stabilizing the feedback system is facilitated. The DC-DC converter comprises an error-amplifier circuit for generating the error signal that is obtained by amplifying the error between the output and a target value, an oscillating circuit for generating a triangular wave signal having an amplitude corresponding to the error signal, and a comparison circuit for comparing the triangular wave signal with a reference signal having a predetermined value and for generating the drive signal to turn ON/OFF a switching device.

    摘要翻译: 本发明旨在提供一种DC-DC转换器,其中驱动信号的占空比与输出DC电压之间的关系是非线性的,其特征在于误差信号与输出DC电压之间的关系是线性的 并且促进了稳定反馈系统的设计。 DC-DC转换器包括用于产生通过放大输出与目标值之间的误差而获得的误差信号的误差放大器电路,产生具有对应于误差信号的振幅的三角波信号的振荡电路,以及 比较电路,用于将三角波信号与具有预定值的参考信号进行比较,并产生用于导通/关断开关装置的驱动信号。

    Power supply
    6.
    发明申请
    Power supply 有权
    电源

    公开(公告)号:US20060164021A1

    公开(公告)日:2006-07-27

    申请号:US11333312

    申请日:2006-01-18

    IPC分类号: H05B39/04

    CPC分类号: H02M1/08 H02M2001/0025

    摘要: An output detection feedback section (5) for controlling the power supply output voltage of a converter unit (4) in response to an error signal Ve has an error amplifier (26) for outputting the error signal Ve, a phase compensation circuit (41), a state detection circuit (42), and a response compensation circuit (43) for setting the voltage of a capacitor (29) of the phase compensation circuit (41) to a predetermined value. When output voltage is switched, the output voltage is fixed at the predetermined value in a DC manner while a transitional response of the error signal (Ve) is accelerated, so that the output voltage is changed at a high speed to a desired value and the overshoot and undershoot are suppressed around the desired value.

    摘要翻译: 用于响应于误差信号Ve控制转换器单元(4)的电源输出电压的输出检测反馈部分(5)具有用于输出误差信号Ve的误差放大器(26),相位补偿电路(41) 状态检测电路(42)以及用于将相位补偿电路(41)的电容器(29)的电压设定为规定值的响应补偿电路(43)。 当切换输出电压时,在加速误差信号(Ve)的过渡响应的同时,以直流方式将输出电压固定为规定值,使得输出电压以高速变化为期望值, 过冲和下冲被抑制在所需值附近。

    DC-DC converter
    7.
    发明申请

    公开(公告)号:US20060103332A1

    公开(公告)日:2006-05-18

    申请号:US11280314

    申请日:2005-11-17

    IPC分类号: H05B41/36

    摘要: A DC-DC converter has switching means which generates a continuous switching voltage having a specified period from an input voltage and outputs the generated switching voltage, output voltage generating means which receives the switching voltage at an inductor and generates an output voltage obtained by rectifying and smoothing a voltage generated in the inductor, lamp signal generating means which generates a lamp signal and outputs the generated lamp signal, and control means which performs an arithmetic operation using a current signal relative to a current flowing in the inductor, an error signal relative to the output voltage, and the lamp signal to generate a control signal for controlling the operation of the switching means and outputs the generated control signal to the switching means. The lamp signal generating means includes first signal generating means for generating a first output signal based on a frequency divided signal having first and second periods obtained by dividing the time of a clock signal having the specified period and second signal generating means for generating a second output signal having a phase 180 degrees different from the phase of the first output signal based on the frequency divided signal, generates the lamp signal which rises after being held at a constant value for a specified time period in each of the first and second periods, and outputs the generated lamp signal.

    Light emitting diode and a method for manufacturing the same

    公开(公告)号:US06596556B2

    公开(公告)日:2003-07-22

    申请号:US10137432

    申请日:2002-05-03

    申请人: Makoto Ishimaru

    发明人: Makoto Ishimaru

    IPC分类号: H01L2100

    摘要: An LED is provided with a p-type semiconductor region in the shape of an island being buried in an n-type semiconductor region from the surface of it, and forms a pn junction at the interface between these n-type region and p-type region. The pn junction has a bottom junction at the bottom of the n-type region and a side junction at the peripheral side face. The bottom junction comprises a first subjunction being deep and constant in junction depth and a second subjunction varying continuously in junction depth. The depth of the second subjunction is shallower than the depth of the first subjunction. The p-type region portion above the second subjunction is thinner in thickness than the p-type region portion above the first subjunction. A light passing through the p-type region portion of the former is less in absorption and more in optical power of the output light. The total power of the output light of the whole LED is increased correspondingly to reduction in thickness of the p-type region.

    Substrate polishing apparatus and method for polishing semiconductor
substrate
    9.
    发明授权
    Substrate polishing apparatus and method for polishing semiconductor substrate 失效
    基板研磨装置及半导体基板的研磨方法

    公开(公告)号:US6102780A

    公开(公告)日:2000-08-15

    申请号:US198525

    申请日:1998-11-24

    申请人: Makoto Ishimaru

    发明人: Makoto Ishimaru

    IPC分类号: B24B37/30 H01L21/304 B24B1/00

    CPC分类号: B24B37/30

    摘要: A substrate polishing apparatus is provided with: a turntable (36) having a polishing surface; a plate (11) having an attaching surface to which GaAs semiconductor wafers (12a through 12d) are attached; points (42a through 42d) for adjusting the gap between the GaAs semiconductor wafers (12a through 12d) attached to the plate (11) and the polishing surface of the turntable (36); and notches (16a through 16d) formed so that they extend from the portions of the plate (11), where the points (42a through 42d) are formed, to the circumference of the plate (11). A method for polishing a semiconductor substrate employs the substrate polishing apparatus.

    摘要翻译: 基板研磨装置具备:具有研磨面的转台(36) 具有安装有GaAs半导体晶片(12a〜12d)的安装面的板(11) 用于调整附着在板(11)的GaAs半导体晶片(12a至12d)与转台(36)的抛光表面之间的间隙的点(42a至42d); 以及形成为使得它们从形成有点(42a至42d)的板(11)的部分延伸到板(11)的圆周的凹口(16a至16d)。 用于研磨半导体衬底的方法采用衬底抛光装置。