Protective layering process for circuit boards
    2.
    发明授权
    Protective layering process for circuit boards 有权
    电路板保护层叠工艺

    公开(公告)号:US09254588B1

    公开(公告)日:2016-02-09

    申请号:US13682980

    申请日:2012-11-21

    IPC分类号: B29C41/20

    摘要: A polymer layering process that encapsulates and protects electronics components with complex and imprecise geometries. The protective layering process provides a combination of a flexible mold and/or a rigid mold that apply close-forming, encapsulating the polymer layers to the electronic components and precision assemblies. Polymer layer protective jackets are shaped to as-populated circuit boards and assemblies, providing tightly fit barriers with fine resolution accommodating imprecise geometries. The protective jackets can be formed in rigid, semi-rigid, or highly flexible polymer films, to protect the circuitry from the elements, CTE mismatches, shock and vibration loads and extreme g-forces.

    摘要翻译: 聚合物分层工艺,用复杂且不精确的几何封装和保护电子元件。 保护层叠方法提供了柔性模具和/或刚性模具的组合,其应用紧密成型,将聚合物层封装到电子部件和精密组件。 聚合物层保护套被成形为人机接口的电路板和组件,提供紧密配合的屏障,其精细分辨率适应不精确的几何形状。 保护套可以形成刚性,半刚性或高度柔性的聚合物膜,以保护电路免受元件,CTE不匹配,冲击和振动负载以及极端的g力。