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    Administering computing system resources in a computing system
    1.
    发明授权
    Administering computing system resources in a computing system 有权
    管理计算系统中的计算系统资源

    公开(公告)号：US08495269B2

    公开(公告)日：2013-07-23

    申请号：US13529217

    申请日：2012-06-21

    申请人： Mark A. Brandyberry ,  Todd W. Justus ,  Paul D. Kangas ,  Brent W. Yardley ,  Ivan R. Zapata

    发明人： Mark A. Brandyberry ,  Todd W. Justus ,  Paul D. Kangas ,  Brent W. Yardley ,  Ivan R. Zapata

    IPC分类号： G06F9/02 ,  H05K7/20

    CPC分类号： G06F1/20 ,  G06F1/185

    摘要： Administering computing system resources in a computing system, the computing system comprising at least one slot adapted to receive an electrical component having a set of pins, the slot configured to couple pins of the electrical component to the computing system, installed within the slot a presence detectable baffle, the presence detectable baffle comprising a passive chassis having a form factor consistent with the electrical component and a presence detectable pin set connected to the passive chassis, the pin set consistent with the electrical component, including: identifying, by a system manager, the presence detectable baffle; and managing, by the system manager, computing system operating attributes in dependence upon presence detectable baffle attributes.

    摘要翻译： 在计算系统中管理计算系统资源，所述计算系统包括适于接收具有一组引脚的电气部件的至少一个插槽，所述插槽被配置为将安装在所述插槽内的所述电气部件的引脚耦合到所述计算系统 存在可检测的挡板包括具有与电气部件一致的形状因数的无源底板和连接到被动底盘的存在可检测引脚组，该引脚与电部件一致，包括：由系统管理器识别， 存在可检测的挡板; 并且由系统管理员根据存在的可检测的挡板属性来管理计算系统的操作属性。

    Persisting value relevant to debugging of computer system during reset of computer system
    3.
    发明授权
    Persisting value relevant to debugging of computer system during reset of computer system 有权
    计算机系统复位期间与计算机系统调试相关的持久价值

    公开(公告)号：US08041936B2

    公开(公告)日：2011-10-18

    申请号：US11926083

    申请日：2007-10-28

    申请人： Ryuji Orita ,  Mark A. Brandyberry ,  Mehul M. Shah ,  Sean P. Brogan

    发明人： Ryuji Orita ,  Mark A. Brandyberry ,  Mehul M. Shah ,  Sean P. Brogan

    IPC分类号： G11C29/00 ,  G06F11/22

    CPC分类号： G06F11/1417 ,  G06F11/0787

    摘要： The last value of an element of a computing system is continually stored within a first register. The element is cleared during any restart or reset of the computing system. The last value is relevant to debugging of the computing system when the computing system fails to perform as expected and/or as desired. Upon receiving an instruction to reset the computing system via a first reset signal corresponding to pressing of a reset button or a second reset signal corresponding to a baseboard management controller issuing a reset command, the last value of the element as stored within the first register is copied to a second register. The computing system is then reset. The last value of the element as stored within the second register persists within the second register during this type of reset, but is cleared during any other reset or restart of the computing system.

    摘要翻译： 计算系统的元素的最后一个值被连续地存储在第一寄存器中。 该元素在计算系统的任何重新启动或重置期间被清除。 最后一个值与计算系统在计算系统按预期和/或需要时不能执行的调试相关。 当接收到通过对应于复位按钮的按下的第一复位信号或对应于发出复位命令的基板管理控制器的第二复位信号来重置计算系统的指令时，存储在第一寄存器内的元件的最后值是 复制到第二个寄存器。 然后重新计算系统。 在这种类型的复位期间，存储在第二寄存器内的元素的最后一个值在第二个寄存器内仍然存在，但在计算系统的任何其他复位或重新启动期间都会被清除。

    Processor Fault Isolation
    8.
    发明申请
    Processor Fault Isolation 有权
    处理器故障隔离

    公开(公告)号：US20080052576A1

    公开(公告)日：2008-02-28

    申请号：US11464393

    申请日：2006-08-14

    申请人： Mark A. Brandyberry ,  Lee H. Wilson

    发明人： Mark A. Brandyberry ,  Lee H. Wilson

    IPC分类号： G01R31/28

    CPC分类号： G06F11/2242 ,  G01R31/318533

    摘要： Methods, apparatus, and products for processor fault isolation are disclosed that include sending, by an embedded system microcontroller to a programmable logic device (‘PLD’) a selection signal identifying one processor for boundary scan operations; sending boundary scan input signals to be sent to the identified processor; multiplexing by the PLD the boundary scan input signals to the identified processor; and sending boundary scan output signals returned from the identified processor. Methods, apparatus, and products for processor fault isolation are also disclosed that include connecting two or more processors in a boundary scan test chain, the connecting carried out by a PLD of a computer, the PLD further connected to sense lines carrying presence signals indicating whether processors are present in the computer; and including in the chain all processors indicated present according to presence signals.

    摘要翻译： 公开了用于处理器故障隔离的方法，装置和产品，其包括由嵌入式系统微控制器向可编程逻辑器件（“PLD”）发送识别用于边界扫描操作的一个处理器的选择信号; 发送要发送到所识别的处理器的边界扫描输入信号; 通过PLD将边界扫描输入信号复用到识别的处理器; 并发送从所识别的处理器返回的边界扫描输出信号。 还公开了用于处理器故障隔离的方法，装置和产品，其包括在边界扫描测试链中连接两个或多个处理器，由计算机的PLD执行的连接，PLD进一步连接到传送线，其携带存在信号，指示是否 处理器存在于计算机中; 并且在链中包括所有处理器根据存在信号指示存在。

    Administering Computing System Resources In A Computing System
    10.
    发明申请
    Administering Computing System Resources In A Computing System 有权
    在计算系统中管理计算系统资源

    公开(公告)号：US20130060984A1

    公开(公告)日：2013-03-07

    申请号：US13226134

    申请日：2011-09-06

    申请人： Mark A. Brandyberry ,  Todd W. Justus ,  Paul D. Kangas ,  Brent W. Yardley ,  Ivan R. Zapata

    发明人： Mark A. Brandyberry ,  Todd W. Justus ,  Paul D. Kangas ,  Brent W. Yardley ,  Ivan R. Zapata

    IPC分类号： G06F13/00

    CPC分类号： G06F1/20 ,  G06F1/185

    摘要： Administering computing system resources in a computing system, the computing system comprising at least one slot adapted to receive an electrical component having a set of pins, the slot configured to couple pins of the electrical component to the computing system, installed within the slot a presence detectable baffle, the presence detectable baffle comprising a passive chassis having a form factor consistent with the electrical component and a presence detectable pin set connected to the passive chassis, the pin set consistent with the electrical component, including: identifying, by a system manager, the presence detectable baffle; and managing, by the system manager, computing system operating attributes in dependence upon presence detectable baffle attributes.

    摘要翻译： 在计算系统中管理计算系统资源，所述计算系统包括适于接收具有一组引脚的电气部件的至少一个插槽，所述插槽被配置为将安装在所述插槽内的所述电气部件的引脚耦合到所述计算系统 存在可检测的挡板包括具有与电气部件一致的形状因数的无源底板和连接到被动底盘的存在可检测引脚组，该引脚与电部件一致，包括：由系统管理器识别， 存在可检测的挡板; 并且由系统管理员根据存在的可检测的挡板属性来管理计算系统的操作属性。