公开(公告)号：US5237206A

公开(公告)日：1993-08-17

申请号：US969525

申请日：1992-10-30

申请人： Masamitsu Yahata ,  Noriyoshi Tozawa ,  Toshiki Tsushima

发明人： Masamitsu Yahata ,  Noriyoshi Tozawa ,  Toshiki Tsushima

IPC分类号： H01L21/50 ,  H01L21/58 ,  H01L23/10 ,  H01L23/13

CPC分类号： H01L24/83 ,  H01L21/50 ,  H01L23/10 ,  H01L23/13 ,  H01L24/26 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/3511

摘要： A low-melting point glass sealed semiconductor device comprises a pair of ceramic substrates, each of which is shaped like an arch. The ceramic substrates are overlaid with each other, in such a manner as to define a space between them. Through this space, a gas generated from a thermosetting mounting agent used for adhesion is guided to the outside of the semiconductor device.

摘要翻译： 低熔点玻璃密封半导体器件包括一对陶瓷基板，每个陶瓷基板的形状都像拱形。 陶瓷基板彼此重叠，以便在它们之间限定空间。 通过该空间，由用于粘合的热固性安装剂产生的气体被引导到半导体器件的外部。

公开(公告)号：US06396086B1

公开(公告)日：2002-05-28

申请号：US09404090

申请日：1999-09-23

申请人： Yuji Takeuchi ,  Riichiro Shirota ,  Seiichi Aritome ,  Masashi Umemura ,  Yuuichiro Murahama ,  Hitoshi Araki ,  Masamitsu Yahata ,  Osamu Ikeda

发明人： Yuji Takeuchi ,  Riichiro Shirota ,  Seiichi Aritome ,  Masashi Umemura ,  Yuuichiro Murahama ,  Hitoshi Araki ,  Masamitsu Yahata ,  Osamu Ikeda

IPC分类号： H01L2710

CPC分类号： H01L27/088 ,  H01L21/76838 ,  H01L27/0629 ,  H01L27/0805 ,  H01L29/94

摘要： In a semiconductor device of MOS structure, the element region has a shape such as a square shape which has a plurality of sides and a plurality of corners. On the element region, a conductive film which constitutes one electrode of the MOS structure is formed. The other electrode of the MOS structure is a silicon substrate. The conductive film is provided so as to cover at least sides adjacent to each other and so as not to cover the corners including the corners which are the contact points (intersecting points) of the adjacent sides. Further, in case the element region is in a ring shape, the conductive film is provided so as to cover none of the corners including the inside corners of the ring-shaped element region. By the above-mentioned structure, the occurrence of breakdown in the insulation film in the MOS structure can be prevented, and the reliability thereof can be enhanced.

摘要翻译： 在MOS结构的半导体器件中，元件区域具有多个侧面和多个角的方形的形状。 在元件区域上形成构成MOS结构的一个电极的导电膜。 MOS结构的另一个电极是硅衬底。 导电膜被设置成覆盖彼此相邻的至少边，并且不覆盖包括作为相邻侧的接触点（交叉点）的角部的角部。 此外，在元件区域为环形的情况下，导电膜被设置成不覆盖包括环形元件区域的内角的任何角。 通过上述结构，可以防止在MOS结构中的绝缘膜中发生击穿，从而可以提高其可靠性。

公开(公告)号：US5384475A

公开(公告)日：1995-01-24

申请号：US957555

申请日：1992-10-08

申请人： Masamitsu Yahata

发明人： Masamitsu Yahata

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L21/8247 ,  H01L23/52 ,  H01L23/522 ,  H01L23/535 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L23/48 ,  H01L21/265

CPC分类号： H01L23/535 ,  H01L27/115 ,  H01L2924/0002

摘要： When the present invention is used for an EPROM, diffused wiring regions for bit lines on a semiconductor substrate, epitaxial layers on the semiconductor substrate and the diffused wiring region, drain diffused regions and source diffused regions on the epitaxial layer are provided, and internal contacts for electrically connecting the diffused wiring regions to the drain diffused regions and the source diffused regions are formed. Contact holes indispensably need a predetermined size so as to preferably conduct, but the wirings are buried in the epitaxial layer to reduce or eliminate the contact holes and to improve integration.

摘要翻译： 当本发明用于EPROM时，提供半导体衬底上位线的扩散布线区域，半导体衬底上的外延层和扩散布线区域，外延层上的漏极扩散区域和源极扩散区域，并且内部触点 用于将扩散布线区域电连接到漏极扩散区域并形成源极扩散区域。 接触孔不可缺少地需要预定的尺寸以优选地导电，但是布线被埋在外延层中以减少或消除接触孔并改善一体化。