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公开(公告)号:US20080026579A1
公开(公告)日:2008-01-31
申请号:US11459931
申请日:2006-07-25
申请人: Kuo-Chih Lai , Mei-Ling Chen , Jei-Ming Chen , Hsin-Hsing Chen , Shih-Feng Su , Meng-Chi Chen
发明人: Kuo-Chih Lai , Mei-Ling Chen , Jei-Ming Chen , Hsin-Hsing Chen , Shih-Feng Su , Meng-Chi Chen
IPC分类号: H01L21/44
CPC分类号: H01L21/76877 , H01L21/02074 , H01L21/76883
摘要: A copper damascene process includes providing a substrate having a dielectric layer thereon, forming at least a copper damascene structure in the dielectric layer, performing a heat treatment on the substrate, and performing a reduction plasma treatment on a surface of the copper damascene structure. The impurities formed in the copper damascene process are removed by the heat treatment, therefore the copper damascene structure is completely reduced by the reduction plasma treatment and is improved.
摘要翻译: 铜镶嵌工艺包括提供其上具有介电层的基板,在介电层中至少形成铜镶嵌结构,对基板进行热处理,并对铜镶嵌结构的表面进行还原等离子体处理。 通过热处理除去在铜镶嵌工艺中形成的杂质,因此通过还原等离子体处理完全减少铜镶嵌结构并改善。
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公开(公告)号:US07538024B2
公开(公告)日:2009-05-26
申请号:US10908229
申请日:2005-05-03
申请人: Hsien-Che Teng , Chin-Fu Lin , Meng-Chi Chen
发明人: Hsien-Che Teng , Chin-Fu Lin , Meng-Chi Chen
IPC分类号: H01L21/4763
CPC分类号: H01L21/2855 , H01L21/28562 , H01L21/76843 , H01L21/76846 , H01L21/76873
摘要: A method for fabricating a dual-damascene copper structure includes providing a semiconductor substrate having a dielectric layer thereon and a dual-damascene hole positioned in the dielectric layer, wherein a portion of the semiconductor substrate is exposed in the dual-damascene hole. A PVD process and an atomic CVD process are sequentially performed to form a substrate-protecting layer and a tantalum nitride layer in the dual-damascene hole. And then a copper layer is formed in the dual-damascene hole.
摘要翻译: 一种用于制造双镶嵌铜结构的方法包括提供其上具有电介质层的半导体衬底和位于电介质层中的双镶嵌孔,其中半导体衬底的一部分暴露在双镶嵌孔中。 依次进行PVD工艺和原子CVD工艺以在双镶嵌孔中形成衬底保护层和氮化钽层。 然后在双镶嵌孔中形成铜层。
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公开(公告)号:US20060252250A1
公开(公告)日:2006-11-09
申请号:US10908229
申请日:2005-05-03
申请人: Hsien-Che Teng , Chin-Fu Lin , Meng-Chi Chen
发明人: Hsien-Che Teng , Chin-Fu Lin , Meng-Chi Chen
IPC分类号: H01L21/4763
CPC分类号: H01L21/2855 , H01L21/28562 , H01L21/76843 , H01L21/76846 , H01L21/76873
摘要: A method for fabricating a dual-damascene copper structure includes providing a semiconductor substrate having a dielectric layer thereon and a dual-damascene hole positioned in the dielectric layer, wherein a portion of the semiconductor substrate is exposed in the dual-damascene hole. A PVD process and an atomic CVD process are sequentially performed to form a substrate-protecting layer and a tantalum nitride layer in the dual-damascene hole. And then a copper layer is formed in the dual-damascene hole.
摘要翻译: 一种用于制造双镶嵌铜结构的方法包括提供其上具有电介质层的半导体衬底和位于电介质层中的双镶嵌孔,其中半导体衬底的一部分暴露在双镶嵌孔中。 依次进行PVD工艺和原子CVD工艺以在双镶嵌孔中形成衬底保护层和氮化钽层。 然后在双镶嵌孔中形成铜层。
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