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公开(公告)号:US07151473B2
公开(公告)日:2006-12-19
申请号:US11203717
申请日:2005-08-15
IPC分类号: H03M1/84
摘要: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver. In an embodiment, the in-phase analog-to-digital converter 112 and the in-phase digital filter 114 comprise an intermediate frequency receiver.
摘要翻译: 提供接收器100。 接收器100包括同相模拟数字转换器112,其可操作以检测同相模数转换器112的饱和状态,并调整由同相模数转换器112处理的同相信号的振幅 模数转换器112以从饱和状态除去同相模数转换器112;以及同相数字滤波器114,其可操作以调整施加到同相数字滤波器114的数字输入的增益 来自同相模数转换器112的增益基本上与由同相模数转换器112处理的同相信号的振幅的调整成反比。 在一个实施例中,接收器100还包括基本上类似于同相路径的正交路径,并且同相路径和正交路径包括直接转换接收器。 在一个实施例中,同相模数转换器112和同相数字滤波器114包括中频接收器。
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公开(公告)号:US07283004B2
公开(公告)日:2007-10-16
申请号:US10561556
申请日:2004-06-16
申请人: Mikael Guenais
发明人: Mikael Guenais
IPC分类号: H03L7/093
CPC分类号: H03L7/093 , H03L7/0893 , H03L7/18
摘要: A phase locked loop filter comprising a first capacitor for connecting to a first charge pump path; and a parallel resistor/capacitor circuit for connecting to a second charge pump path with the resistor/capacitor circuit having a second capacitor; wherein the first capacitor and second capacitor are connected in series to allow a voltage associated with the first capacitor and a voltage associated with the parallel resistor/capacitor circuit to be added together.
摘要翻译: 一种锁相环滤波器,包括用于连接到第一电荷泵路径的第一电容器; 以及用于连接到具有第二电容器的电阻器/电容器电路的第二电荷泵路径的并联电阻器/电容器电路; 其中所述第一电容器和所述第二电容器串联连接以允许与所述第一电容器相关联的电压和与所述并联电阻器/电容器电路相关联的电压加在一起。
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公开(公告)号:US20070090882A1
公开(公告)日:2007-04-26
申请号:US10561556
申请日:2004-06-16
申请人: Mikael Guenais
发明人: Mikael Guenais
IPC分类号: H03L7/00
CPC分类号: H03L7/093 , H03L7/0893 , H03L7/18
摘要: A phase locked loop filter comprising a first capacitor for connecting to a first charge pump path; and a parallel resistor/capacitor circuit for connecting to a second charge pump path with the resistor/capacitor circuit having a second capacitor; wherein the first capacitor and second capacitor are connected in series to allow a voltage associated with the first capacitor and a voltage associated with the parallel resistor/capacitor circuit to be added together.
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公开(公告)号:US20060055579A1
公开(公告)日:2006-03-16
申请号:US11203717
申请日:2005-08-15
IPC分类号: H03M1/12
摘要: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver. In an embodiment, the in-phase analog-to-digital converter 112 and the in-phase digital filter 114 comprise an intermediate frequency receiver.
摘要翻译: 提供接收器100。 接收器100包括同相模拟数字转换器112,其可操作以检测同相模数转换器112的饱和状态,并调整由同相模数转换器112处理的同相信号的振幅 模数转换器112以从饱和状态除去同相模数转换器112;以及同相数字滤波器114,其可操作以调整施加到同相数字滤波器114的数字输入的增益 来自同相模数转换器112的增益基本上与由同相模数转换器112处理的同相信号的振幅的调整成反比地成比例。在一个实施例中 接收器100还包括基本上类似于同相路径的正交路径,并且同相路径和正交路径包括直接转换接收器。 在一个实施例中,同相模数转换器112和同相数字滤波器114包括中频接收器。
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