RECEIVER WITH DISCRETE-TIME FILTERING AND DOWN-CONVERSION
    1.
    发明申请
    RECEIVER WITH DISCRETE-TIME FILTERING AND DOWN-CONVERSION 审中-公开
    接收器具有隔离滤波和下变频

    公开(公告)号:US20090161801A1

    公开(公告)日:2009-06-25

    申请号:US12025779

    申请日:2008-02-05

    IPC分类号: H04L27/06

    CPC分类号: H04L27/06

    摘要: A receiver with discrete-time filtering and down-conversion is provided. The receiver includes a mixer and a sampling-and-filtering device. The sampling-and-filtering device is coupled to the mixer. The mixer receives a first radio frequency signal, and then mixes the first radio frequency with a reference signal to generate a first signal. The first signal is a continuous-time signal. The sampling-and-filtering device sequentially samples, filters, and down-converts the first signal according to a clock signal to generate a second signal.

    摘要翻译: 提供了具有离散时间滤波和下变频的接收机。 接收机包括混频器和采样和滤波装置。 采样和滤波装置耦合到混频器。 混合器接收第一射频信号,然后将第一射频与参考信号混合以产生第一信号。 第一个信号是一个连续时间信号。 采样和滤波装置根据时钟信号顺序采样,滤波和下变频第一信号以产生第二信号。

    PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF
    2.
    发明申请
    PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF 审中-公开
    相变存储器件及其制造方法

    公开(公告)号:US20070285962A1

    公开(公告)日:2007-12-13

    申请号:US11741717

    申请日:2007-04-27

    IPC分类号: G11C11/00 H01L21/76

    摘要: A phase change memory device is disclosed. A first columnar electrode and a second columnar electrode are provided, both arranged horizontally. A phase change layer is interposed between the first columnar electrode and the second columnar electrode, electrically connecting both thereof, wherein the entirety of the phase change layer is disposed on a plane. A bottom electrode electrically connects the first columnar electrode. A top electrode electrically connects the second columnar electrode.

    摘要翻译: 公开了一种相变存储器件。 设置有水平排列的第一柱状电极和第二柱状电极。 相变层插入在第一柱状电极和第二柱状电极之间,将其两者电连接,其中整个相变层设置在平面上。 底部电极电连接第一柱状电极。 顶部电极电连接第二柱状电极。

    Circuit with programmable signal bandwidth and method thereof
    3.
    发明授权
    Circuit with programmable signal bandwidth and method thereof 有权
    具有可编程信号带宽的电路及其方法

    公开(公告)号:US07962115B2

    公开(公告)日:2011-06-14

    申请号:US12025784

    申请日:2008-02-05

    IPC分类号: H04B1/16 H03L7/00

    CPC分类号: H03H19/004 H03D7/165

    摘要: A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0.

    摘要翻译: 提供了具有可编程信号带宽的电路。 该电路包括第一充电和放电装置,第一复位装置和第一可变电容器装置。 第一复位装置耦合到第一充电和放电装置,并且第一可变电容器装置耦合到第一充电和放电装置。 第一复位装置由放电使能信号控制并用于提供第一放电路径。 当放电使能信号关闭第一复位装置时,第一可变电容器装置根据n个参考信号产生第一充电和放电装置的第一总等效电容,并且n是大于0的整数。

    CIRCUIT WITH PROGRAMMABLE SIGNAL BANDWIDTH AND METHOD THEREOF
    4.
    发明申请
    CIRCUIT WITH PROGRAMMABLE SIGNAL BANDWIDTH AND METHOD THEREOF 有权
    具有可编程信号带宽的电路及其方法

    公开(公告)号:US20090170466A1

    公开(公告)日:2009-07-02

    申请号:US12025784

    申请日:2008-02-05

    IPC分类号: H04B1/16 H03L7/00

    CPC分类号: H03H19/004 H03D7/165

    摘要: A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0.

    摘要翻译: 提供了具有可编程信号带宽的电路。 该电路包括第一充电和放电装置,第一复位装置和第一可变电容器装置。 第一复位装置耦合到第一充电和放电装置,并且第一可变电容器装置耦合到第一充电和放电装置。 第一复位装置由放电使能信号控制并用于提供第一放电路径。 当放电使能信号关闭第一复位装置时,第一可变电容器装置根据n个参考信号产生第一充电和放电装置的第一总等效电容,并且n是大于0的整数。

    COMPARISON APPARATUS AND SPEED-UP METHOD FOR COMPARATOR
    5.
    发明申请
    COMPARISON APPARATUS AND SPEED-UP METHOD FOR COMPARATOR 审中-公开
    比较器的比较装置和速度比较方法

    公开(公告)号:US20110267145A1

    公开(公告)日:2011-11-03

    申请号:US12832970

    申请日:2010-07-08

    IPC分类号: H03F3/45

    摘要: A comparison apparatus and a speed-up method for comparator are provided. The comparison apparatus consists of a comparator and a bias modulator. The bias modulator receives input signals of the comparator to provide a set of output signals modulated according to the input signals. The set of output signals dynamically adjust body voltages of transistors in a positive feedback network of the comparator to increase a switching speed of the transistors. Therefore, an operation speed of the comparator can also be increased.

    摘要翻译: 提供了一种用于比较器的比较装置和加速方法。 比较装置由比较器和偏置调制器组成。 偏置调制器接收比较器的输入信号,以提供根据输入信号调制的一组输出信号。 该组输出信号在比较器的正反馈网络中动态地调节晶体管的体电压,以增加晶体管的切换速度。 因此,也可以提高比较器的动作速度。