公开(公告)号：US5677503A

公开(公告)日：1997-10-14

申请号：US540303

申请日：1995-10-06

申请人： Mitsuhiro Kurata

发明人： Mitsuhiro Kurata

IPC分类号： G10H7/02 ,  G10H7/00 ,  G10H7/06

CPC分类号： G10H7/02

摘要： A tone generator has a waveform memory which stores waveform data at least having a loop section defined by a loop start address and a loop end address for repetitive reading out. An address-generating circuit generates a readout address by which the waveform data is read out from the waveform memory and delivers the readout address to the waveform memory to read out the waveform data from the waveform memory. A bit mask circuit masks a predetermined range of more significant bits of the readout address to generate a bit-masked address value. When it is determined that the readout address falls outside the loop section at least at one side of the loop start address and the loop end address of the loop section, a looping readout address generated by the use of the bit-masked address value is delivered as the readout address.

摘要翻译： 乐音发生器具有波形存储器，其存储至少具有由循环起始地址定义的循环部分和用于重复读出的循环结束地址的波形数据。 地址生成电路生成从波形存储器读出波形数据的读出地址，并将读出的地址传送到波形存储器，以从波形存储器读出波形数据。 位屏蔽电路屏蔽读出地址的更高有效位的预定范围以产生位屏蔽地址值。 当确定读出地址至少在环路起始地址的一侧和环路部分的环路结束地址处于环路部分之外时，通过使用位掩蔽地址值产生的循环读出地址被传递 作为读出地址。

公开(公告)号：US5869781A

公开(公告)日：1999-02-09

申请号：US840898

申请日：1997-04-17

申请人： Mitsuhiro Kurata

发明人： Mitsuhiro Kurata

IPC分类号： G10H1/02 ,  G10H1/04 ,  G10H1/057 ,  G10H1/12 ,  G10H7/00 ,  G10H7/02 ,  G10H1/06

CPC分类号： G10H7/004 ,  G10H1/04 ,  G10H1/0575 ,  G10H1/125 ,  G10H7/02 ,  G10H2250/621

摘要： A tone signal generator includes a tone signal data generating device, a signal data generating device, and a sound effects imparting device, such as a digital signal processor. The sound effects are imparted to the tone signal data based on the signal data in such a way that the digital signal processor processes the tone signal data and the signal data by repeatedly multiplying and adding them. In the process, a signal data supplying device supplies the tone signal data to the signal data generating device so that the tone signal data is used in place of the signal data. The digital signal processor processes the first tone signal data generated by the tone signal generating device and the second tone signal device supplied by the signal data supplying device so that the sound effects are imparted to the first tone signal data based on the second tone signal data.

摘要翻译： 音调信号发生器包括音调信号数据产生装置，信号数据产生装置和诸如数字信号处理器的声音效果赋予装置。 声音效果基于信号数据被赋予音调信号数据，使得数字信号处理器通过重复乘以它们来处理音调信号数据和信号数据。 在该过程中，信号数据提供装置将音调信号数据提供给信号数据产生装置，以便使用音调信号数据代替信号数据。 数字信号处理器处理由音频信号产生装置产生的第一音调信号数据和由信号数据提供装置提供的第二音调信号装置，使得基于第二音调信号数据将声音效果赋予第一音调信号数据 。

公开(公告)号：US5309168A

公开(公告)日：1994-05-03

申请号：US784776

申请日：1991-10-30

申请人： Shuhei Itoh ,  Mitsuhiro Kurata

发明人： Shuhei Itoh ,  Mitsuhiro Kurata

IPC分类号： G09G3/36 ,  G09G3/00

CPC分类号： G09G3/3644

摘要： A CRT controller is operated in accordance with a basic clock for a panel display and repeats a wait operation in response to a wait signal produced by a panel timing controller, which causes a compulsory synchronization with the panel timing. A 1/2 frame buffer is also provided. Display data supplied by the CRT controller and display data read from the 1/2 frame buffer are alternately selected such that data is supplied in an order conforming to the panel display of a double screen type panel display. A display of the double screen type panel display is controlled in accordance with an application program directed to a CRT display without modifying the order of the display data produced by the CRT controller and without changing the timing data which has been set in the CRT controller. The 1/2 frame buffer may be a general-purpose memory which stores 1/2 frame and one line of the panel display data. A 1/2 frame buffer control circuit shifts a writing address of the 1/2 frame buffer by one line in a reverse direction to a direction of scanning for writing at the beginning of each new frame.

摘要翻译： CRT控制器根据用于面板显示的基本时钟进行操作，并且响应于由面板定时控制器产生的等待信号重复等待操作，这导致与面板定时的强制同步。 还提供了一个1/2帧缓冲区。 交替地选择由CRT控制器提供的显示数据和从1/2帧缓冲器读取的显示数据，使得以符合双屏幕面板显示器的面板显示的顺序提供数据。 根据针对CRT显示器的应用程序来控制双屏幕型面板显示器的显示，而不改变由CRT控制器产生的显示数据的顺序，而不改变在CRT控制器中设置的定时数据。 1/2帧缓冲器可以是存储1/2帧和一行面板显示数据的通用存储器。 1/2帧缓冲器控制电路在每个新帧开始时将1/2帧缓冲器的写入地址沿与扫描方向相反的方向移位一行。

公开(公告)号：US5741991A

公开(公告)日：1998-04-21

申请号：US414929

申请日：1995-03-31

申请人： Mitsuhiro Kurata

发明人： Mitsuhiro Kurata

IPC分类号： G10H1/057 ,  G10H1/18 ,  G10H7/00 ,  G10H1/02

CPC分类号： G10H7/004 ,  G10H1/0575 ,  G10H1/183

摘要： A tone signal generator including a memory for storing tone signal data, a parameter generation device for generating parameter data, and a tone signal data generation device for generating the tone signal data by reading it from the memory, according to the parameter data. The generator includes also a level monitor device for monitoring a level of the tone signal data, and access control device to the memory. The access control device inhibits an access of the tone signal generation device to the memory when the level monitor device detects that the level of the tone signal data monitored is less than a specified value. Because the access control device inhibits the access of the tone signal generation device when the level of the tone signal data reaches the specified value, any other devices, such as a cpu, can access to the memory device in place of the tone signal generation device. Another embodiment of the present invention further comprises a phase change control device for changing a generating phase of envelope data from an attack phase to a following phase, when a read address in the attack phase of the tone signal data reaches an end address. This configuration allows the phase timing of the envelope data and the tone signal data to be severely matched.

摘要翻译： 一种音频信号发生器，包括用于存储音调信号数据的存储器，用于产生参数数据的参数产生装置，以及根据参数数据通过从存储器读取音调信号数据来生成音调信号数据的音调信号数据生成装置。 发电机还包括用于监视音调信号数据的级别的电平监视器装置，以及存取控制装置。 当电平监视装置检测到所监听的音调信号数据的电平小于指定值时，访问控制装置禁止音调信号产生装置对存储器的访问。 由于当音调信号数据的电平达到指定值时，访问控制装置禁止音调信号产生装置的访问，所以诸如cpu之类的任何其他装置可以访问存储装置来代替音调信号产生装置 。 本发明的另一个实施例还包括一个相变控制装置，用于当音调信号数据的攻击阶段的读地址到达结束地址时，将包络数据的生成阶段从攻击阶段改变到后续阶段。 该配置允许包络数据和音调信号数据的相位定时严格匹配。

公开(公告)号：US5610621A

公开(公告)日：1997-03-11

申请号：US175195

申请日：1993-12-28

申请人： Shuhei Itoh ,  Mitsuhiro Kurata

发明人： Shuhei Itoh ,  Mitsuhiro Kurata

IPC分类号： G09G3/36 ,  G09G5/00

CPC分类号： G09G3/3644

摘要： A CRT controller is operated in accordance with a basic clock for a panel display and repeats a wait operation in response to a wait signal produced by a panel timing controller, which causes a compulsory synchronization with the panel timing. A 1/2 frame buffer is also provided. Display data supplied by the CRT controller and display data read from the 1/2 frame buffer are alternately selected such that data is supplied in an order conforming to the panel display of a double screen type panel display. A display of the double screen type panel display is controlled in accordance with an application program directed to a CRT display without modifying the order of the display data produced by the CRT controller and without changing the timing data which has been set in the CRT controller. The 1/2 frame buffer may be a general-purpose memory which stores 1/2 frame and one line of the panel display data. A 1/2 frame buffer control circuit shifts a writing address of the 1/2 frame buffer by one line in a reverse direction to a direction of scanning for writing at the beginning of each new frame.

摘要翻译： CRT控制器根据用于面板显示的基本时钟进行操作，并且响应于由面板定时控制器产生的等待信号重复等待操作，这导致与面板定时的强制同步。 还提供了A + E，fra 1/2 + EE帧缓冲器。 由CRT控制器提供的显示数据和从+ E，fra 1/2 + EE帧缓冲器读取的显示数据被交替地选择，使得以符合双屏幕面板显示器的面板显示的顺序提供数据。 根据针对CRT显示器的应用程序来控制双屏幕型面板显示器的显示，而不改变由CRT控制器产生的显示数据的顺序，而不改变在CRT控制器中设置的定时数据。 + E，fra 1/2 + EE帧缓冲器可以是存储+ E，fra 1/2 + EE帧和一行面板显示数据的通用存储器。 A + E，fra 1/2 + EE帧缓冲器控制电路将+ E，fra 1/2 + EE帧缓冲器的写入地址沿与每个开始处的写入扫描方向相反的方向移动一行 新框架

公开(公告)号：US5677504A

公开(公告)日：1997-10-14

申请号：US414906

申请日：1995-03-31

申请人： Mitsuhiro Kurata

发明人： Mitsuhiro Kurata

IPC分类号： G10H1/18 ,  G10H7/00 ,  H04J3/00

CPC分类号： G10H1/183

摘要： A tone signal generator includes a plurality of tone generation channels, and a tone generation control data memory for storing instruction data for instructing tone generation or tone release and execution data for instructing execution thereof, for each tone generation channel. The tone signal generator also includes an execution device for executing the tone generation. The execution device executes the tone generation or the tone release for each tone generation channel at an assigned timing in the sampling cycle to the tone generation channel when the instruction data is written in the tone generation control data memory corresponding to the tone generation channel, and then the execution data is written in the memory corresponding to any tone generation channel. After the writing of the instruction data, the executing data is written into the memory. This executing data triggers the tone generation of channels where the instruction data has already been written. As a result, the tone generation in multi-channels is performed at the same time.

摘要翻译： 音调信号发生器包括多个音调生成通道，以及音调生成控制数据存储器，用于存储用于指示音调生成或音调释放的指令数据，以及用于指示每个音调生成通道的指令执行数据。 音调信号发生器还包括用于执行音调生成的执行装置。 当指令数据被写入与音调生成通道对应的音调生成控制数据存储器中时，执行装置在采样周期中的分配定时向音调生成通道执行每个音调生成通道的音调生成或音调释放，以及 则执行数据被写入对应于任何音调生成通道的存储器中。 在写入指令数据之后，将执行数据写入存储器。 该执行数据触发已经写入指令数据的通道的音调生成。 结果，同时进行多声道的音调生成。